[llvm] c7faa68 - Revert "ARM-Darwin: keep the frame register reserved even if not updated."
Alina Sbirlea via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 6 11:00:15 PST 2019
Author: Alina Sbirlea
Date: 2019-12-06T10:59:26-08:00
New Revision: c7faa6814248cf2443cce856a74247fc70699f98
URL: https://github.com/llvm/llvm-project/commit/c7faa6814248cf2443cce856a74247fc70699f98
DIFF: https://github.com/llvm/llvm-project/commit/c7faa6814248cf2443cce856a74247fc70699f98.diff
LOG: Revert "ARM-Darwin: keep the frame register reserved even if not updated."
This reverts commit a7d90af1be48234ce583e00fb16e33633d44ae38.
This revision came back as the root-cause for crashes in internal
ARM-IOS apps.
Reproducer in https://bugs.llvm.org/show_bug.cgi?id=44231.
Added:
Modified:
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/test/CodeGen/Thumb/long.ll
llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
Removed:
llvm/test/CodeGen/ARM/r7-fixed-darwin.ll
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 4ace52b32e9f..52e6d05c3155 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -194,7 +194,7 @@ getReservedRegs(const MachineFunction &MF) const {
markSuperRegs(Reserved, ARM::PC);
markSuperRegs(Reserved, ARM::FPSCR);
markSuperRegs(Reserved, ARM::APSR_NZCV);
- if (TFI->hasFP(MF) || STI.isTargetDarwin())
+ if (TFI->hasFP(MF))
markSuperRegs(Reserved, getFramePointerReg(STI));
if (hasBasePointer(MF))
markSuperRegs(Reserved, BasePtr);
diff --git a/llvm/test/CodeGen/ARM/r7-fixed-darwin.ll b/llvm/test/CodeGen/ARM/r7-fixed-darwin.ll
deleted file mode 100644
index dc59b6acb421..000000000000
--- a/llvm/test/CodeGen/ARM/r7-fixed-darwin.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; RUN: llc -mtriple=thumbv7k-apple-watchos %s -o - | FileCheck %s
-
-; r7 is FP on Darwin, and should be preserved even if we don't create a new
-; frame record for this leaf function. So make huge register pressure to try &
-; tempt LLVM to use it.
-define void @foo([16 x i32]* %ptr) {
-; CHECK-LABEL: foo:
-; CHECK: push.w
-; CHECK: .cfi_offset r7
-; CHECK-NOT: r7
-; CHECK: pop.w
- %val = load volatile [16 x i32], [16 x i32]* %ptr
- store volatile [16 x i32] %val, [16 x i32]* %ptr
- ret void
-}
diff --git a/llvm/test/CodeGen/Thumb/long.ll b/llvm/test/CodeGen/Thumb/long.ll
index 856196af71f5..fbf4b08fd06a 100644
--- a/llvm/test/CodeGen/Thumb/long.ll
+++ b/llvm/test/CodeGen/Thumb/long.ll
@@ -234,7 +234,7 @@ if.end:
%c = add i64 %y, 47
call void @f13(i64 %c)
; CHECK: adds
-; CHECK: adcs
+; CHECK-NEXT: adcs
; CHECK: bl
ret void
}
diff --git a/llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll b/llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
index b00554af6807..b28f4542cf3d 100644
--- a/llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
+++ b/llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
@@ -17,7 +17,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-
; CHECK: bl _f2
; CHECK: clz {{r[0-9]+}}
; CHECK-DAG: lsrs {{r[0-9]+}}
-; CHECK-DAG: lsl.w {{r[0-9]+}}
+; CHECK-DAG: lsls {{r[0-9]+}}
; CHECK-NEXT: orr.w {{r[0-9]+}}
; CHECK-NEXT: InlineAsm Start
define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {
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