[PATCH] D71107: [ARM][MVE] Tail predicate in the presence of vcmp

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: SjoerdMeijer, dmgreen.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: LLVM.

While finalising low-overhead loops, record any VPT blocks within the body of the loop. The blocks are stored by mapping a VPR def to a list of instructions. For any instruction that uses the VPR, we check that it's only using it because it's predicated - not that it's moving or spilling the register. If any instructions are found to do this, then we don't perform tail predication, nor do we if we find a predicate other than 'Then'.
Removal of the VPT blocks is similar to before, but we need to ensure that we only remove ones where the VCTP is the controlling def and insert VPSTs to fix up predication once the original block is removed.
The next step is to enable multiple VCTP instructions which have the same input operand.


https://reviews.llvm.org/D71107

Files:
  llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
  llvm/lib/Target/ARM/MVEVPTBlockPass.cpp
  llvm/lib/Target/ARM/Utils/ARMBaseInfo.h
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir

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