[PATCH] D71046: Support Intel "l" suffixes for x86_64 R8-R15 registers.

[Michael Trent via Phabricator via llvm-commits]

mtrent added a comment.

In D71046#1771729 <https://reviews.llvm.org/D71046#1771729>, @craig.topper wrote:

> I'm not sure what to do here. I'd like to see at least some other widely used tool supporting this. I worry we'll end up in a situation years from now where other tools try to match clang for what seems to have started as quirk in Intel's documentation nearly 15 years ago.


I suppose another way to say it is, we need someone to weigh LLVM's cost of "Allowing code that uses Intel-style register names to exist" against LLVM's cost of "Encouraging Intel-style register names to exist." And this is strictly in the context of x86_64, and not, say, other assembly languages.

In my opinion the cost of code maintenance within LLVM is quite low. Table Gen supports alternate strings, the impact to the parser is negligible. Also, the register names will be canonicalized to the AMD style names if run through a disassembler pass; folks who write "r8l" will have to read "r8b" in otool, lldb, and other tools. That suggests llvm isn't bending over backwards to accommodate or encourage these names.

I'm not sure how to settle the cost of "future tools, years from now" against LLVM's karmic account.


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