[PATCH] D71064: [InstCombine] Invert `add A, sext(B) --> sub A, zext(B)` canonicalization (to `sub A, zext B -> add A, sext B`)

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 5 09:35:40 PST 2019


spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

In D71064#1771063 <https://reviews.llvm.org/D71064#1771063>, @lebedev.ri wrote:

> In D71064#1771030 <https://reviews.llvm.org/D71064#1771030>, @spatel wrote:
>
> > Scalar looks same all-around. Vector shows some potential diffs:
> >  https://godbolt.org/z/y3E-mb
> >
> > If I'm seeing it correctly, we always do better on the typical case where the bool vector is produced by a compare, but we might do worse if we don't have that cmp and don't have AssertSext knowledge.
>
>
> So the comment is that the undo fold needs to be adjusted first, to fire for non-cmp i1 vectors on aarch64 and powerpc64le?


I don't think that's necessary as a preliminary step because we're improving what should be the common patterns (the examples that include the cmp).
LGTM.


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