[PATCH] D71064: [InstCombine] Invert `add A, sext(B) --> sub A, zext(B)` canonicalization (to `sub A, zext B -> add A, sext B`)
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 5 08:19:04 PST 2019
lebedev.ri marked an inline comment as done.
lebedev.ri added a comment.
In D71064#1770937 <https://reviews.llvm.org/D71064#1770937>, @spatel wrote:
> The select transform is 1 that I thought about but never got around to implementing. We should have at least 1 minimal test for that pattern, but I don't see that in the diffs?
See `llvm-project/llvm/test/Transforms/InstCombine/add.ll`.
================
Comment at: llvm/test/Transforms/InstCombine/add.ll:4-44
define i32 @select_0_or_1_from_bool(i1 %x) {
; CHECK-LABEL: @select_0_or_1_from_bool(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[X:%.*]], true
-; CHECK-NEXT: [[ADD:%.*]] = zext i1 [[TMP1]] to i32
+; CHECK-NEXT: [[NOT_X:%.*]] = xor i1 [[X:%.*]], true
+; CHECK-NEXT: [[ADD:%.*]] = zext i1 [[NOT_X]] to i32
; CHECK-NEXT: ret i32 [[ADD]]
;
%ext = sext i1 %x to i32
----------------
@spatel i believe this is the test coverage for select transform
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71064/new/
https://reviews.llvm.org/D71064
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