[PATCH] D70794: [GlobalISel] Fix compiler crash lowering G_LOAD in AArch64.

[Amara Emerson via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG28f5ad5801d4: [GlobalISel] Fix compiler crash lowering G_LOAD in AArch64. (authored by aemerson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70794/new/

https://reviews.llvm.org/D70794

Files:
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir


Index: llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
@@ -0,0 +1,22 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -verify-machineinstrs | FileCheck %s
+---
+name:            test_load_trunc
+stack:
+  - { id: 0, type: default, offset: 0, size: 2,
+      alignment: 2, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body: |
+  bb.0.entry:
+
+    ; CHECK-LABEL: name: test_load_trunc
+    ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
+    ; CHECK: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX]](p0) :: (load 2)
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s10) = G_TRUNC [[LOAD]](s16)
+    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[TRUNC]](s10)
+    ; CHECK: RET_ReallyLR implicit [[TRUNC1]](s1)
+    %0:_(p0) = G_FRAME_INDEX %stack.0
+    %1:_(s10) = G_LOAD %0(p0) :: (load 2)
+    %2:_(s1) = G_TRUNC %1(s10)
+    RET_ReallyLR implicit %2(s1)
+...
Index: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -2117,7 +2117,7 @@
       default:
         llvm_unreachable("Unexpected opcode");
       case TargetOpcode::G_LOAD:
-        MIRBuilder.buildAnyExt(DstReg, TmpReg);
+        MIRBuilder.buildExtOrTrunc(TargetOpcode::G_ANYEXT, DstReg, TmpReg);
         break;
       case TargetOpcode::G_SEXTLOAD:
         MIRBuilder.buildSExt(DstReg, TmpReg);


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