[PATCH] D70806: [Aarch64][SVE] Add intrinsics for gather loads (vector + imm)

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 3 07:27:49 PST 2019


This revision was automatically updated to reflect the committed changes.
Closed by commit rG79f2422d6a68: [Aarch64][SVE] Add intrinsics for gather loads (vector + imm) (authored by sdesmalen).

Changed prior to commit:
  https://reviews.llvm.org/D70806?vs=231713&id=231909#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70806/new/

https://reviews.llvm.org/D70806

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base.ll

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