[PATCH] D70367: Fix for AMDGPU MUL_I24 known bits calculation

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll:4
+; RUN: llc -mtriple amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-code-object-v3 -O2 -amdgpu-function-calls=0 < %s | FileCheck --check-prefix=GCN %s
+; GCN-NOT: -128
+; Function Attrs: alwaysinline convergent norecurse nounwind
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ekuznetsov139 wrote:
> arsenm wrote:
> > ekuznetsov139 wrote:
> > > arsenm wrote:
> > > > Should use positive checks. I don’t know what this would exclude since we won’t emit anything with dashes
> > > This would exclude
> > > 
> > >         global_store_dword v[0:1], v2, off offset:-128
> > > 
> > >           
> > Ok, that’s not obvious. Positive checks are much less error prone 
> This is a negative test. We are testing to make sure that the optimizer does not assume %v1 to be always equal to -32. A negative check fits right in. A positive check would be harder to write since multiple possible correct codes could be generated.
> 
That’s fine. A negative test is easily breakable and should be avoided 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70367/new/

https://reviews.llvm.org/D70367