[llvm] 5154b02 - [MIBundles] Move analyzePhysReg out of MIBundleOperands iterator (NFC).
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 2 12:47:44 PST 2019
Author: Florian Hahn
Date: 2019-12-02T20:47:08Z
New Revision: 5154b0253d262be12d8f21edefd8c6d231dcf7a1
URL: https://github.com/llvm/llvm-project/commit/5154b0253d262be12d8f21edefd8c6d231dcf7a1
DIFF: https://github.com/llvm/llvm-project/commit/5154b0253d262be12d8f21edefd8c6d231dcf7a1.diff
LOG: [MIBundles] Move analyzePhysReg out of MIBundleOperands iterator (NFC).
analyzePhysReg does not really fit into the iterator and moving it
makes it easier to change the base iterator.
Reviewers: evandro, t.p.northover, paquette, MatzeB, arsenm, qcolombet
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D70559
Added:
Modified:
llvm/include/llvm/CodeGen/MachineInstrBundle.h
llvm/lib/CodeGen/InlineSpiller.cpp
llvm/lib/CodeGen/MachineBasicBlock.cpp
llvm/lib/CodeGen/MachineInstrBundle.cpp
llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/MachineInstrBundle.h b/llvm/include/llvm/CodeGen/MachineInstrBundle.h
index 5b5df91fb68b..a6e10e39ec3a 100644
--- a/llvm/include/llvm/CodeGen/MachineInstrBundle.h
+++ b/llvm/include/llvm/CodeGen/MachineInstrBundle.h
@@ -147,47 +147,6 @@ class MachineOperandIteratorBase {
return OpI - InstrI->operands_begin();
}
- /// Information about how a physical register Reg is used by a set of
- /// operands.
- struct PhysRegInfo {
- /// There is a regmask operand indicating Reg is clobbered.
- /// \see MachineOperand::CreateRegMask().
- bool Clobbered;
-
- /// Reg or one of its aliases is defined. The definition may only cover
- /// parts of the register.
- bool Defined;
- /// Reg or a super-register is defined. The definition covers the full
- /// register.
- bool FullyDefined;
-
- /// Reg or one of its aliases is read. The register may only be read
- /// partially.
- bool Read;
- /// Reg or a super-register is read. The full register is read.
- bool FullyRead;
-
- /// Either:
- /// - Reg is FullyDefined and all defs of reg or an overlapping
- /// register are dead, or
- /// - Reg is completely dead because "defined" by a clobber.
- bool DeadDef;
-
- /// Reg is Defined and all defs of reg or an overlapping register are
- /// dead.
- bool PartialDeadDef;
-
- /// There is a use operand of reg or a super-register with kill flag set.
- bool Killed;
- };
-
- /// analyzePhysReg - Analyze how the current instruction or bundle uses a
- /// physical register. This function should not be called after operator++(),
- /// it expects a fresh iterator.
- ///
- /// @param Reg The physical register to analyze.
- /// @returns A filled-in PhysRegInfo struct.
- PhysRegInfo analyzePhysReg(unsigned Reg, const TargetRegisterInfo *TRI);
};
/// MIOperands - Iterate over operands of a single instruction.
@@ -259,6 +218,49 @@ VirtRegInfo AnalyzeVirtRegInBundle(
MachineInstr &MI, unsigned Reg,
SmallVectorImpl<std::pair<MachineInstr *, unsigned>> *Ops = nullptr);
+/// Information about how a physical register Reg is used by a set of
+/// operands.
+struct PhysRegInfo {
+ /// There is a regmask operand indicating Reg is clobbered.
+ /// \see MachineOperand::CreateRegMask().
+ bool Clobbered;
+
+ /// Reg or one of its aliases is defined. The definition may only cover
+ /// parts of the register.
+ bool Defined;
+ /// Reg or a super-register is defined. The definition covers the full
+ /// register.
+ bool FullyDefined;
+
+ /// Reg or one of its aliases is read. The register may only be read
+ /// partially.
+ bool Read;
+ /// Reg or a super-register is read. The full register is read.
+ bool FullyRead;
+
+ /// Either:
+ /// - Reg is FullyDefined and all defs of reg or an overlapping
+ /// register are dead, or
+ /// - Reg is completely dead because "defined" by a clobber.
+ bool DeadDef;
+
+ /// Reg is Defined and all defs of reg or an overlapping register are
+ /// dead.
+ bool PartialDeadDef;
+
+ /// There is a use operand of reg or a super-register with kill flag set.
+ bool Killed;
+};
+
+/// AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses
+/// a physical register. This function should not be called after operator++(),
+/// it expects a fresh iterator.
+///
+/// @param Reg The physical register to analyze.
+/// @returns A filled-in PhysRegInfo struct.
+PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, unsigned Reg,
+ const TargetRegisterInfo *TRI);
+
} // End llvm namespace
#endif
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp b/llvm/lib/CodeGen/InlineSpiller.cpp
index 2ebaf327c03f..75d978472cf3 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -850,8 +850,7 @@ foldMemoryOperand(ArrayRef<std::pair<MachineInstr *, unsigned>> Ops,
// Skip non-Defs, including undef uses and internal reads.
if (MO->isUse())
continue;
- MIBundleOperands::PhysRegInfo RI =
- MIBundleOperands(*FoldMI).analyzePhysReg(Reg, &TRI);
+ PhysRegInfo RI = AnalyzePhysRegInBundle(*FoldMI, Reg, &TRI);
if (RI.FullyDefined)
continue;
// FoldMI does not define this physreg. Remove the LI segment.
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 71354ea43453..f433c4b6c90b 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -1395,8 +1395,7 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
--N;
- MachineOperandIteratorBase::PhysRegInfo Info =
- ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
+ PhysRegInfo Info = AnalyzePhysRegInBundle(*I, Reg, TRI);
// Register is live when we read it here.
if (Info.Read)
@@ -1434,8 +1433,7 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
--N;
- MachineOperandIteratorBase::PhysRegInfo Info =
- ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
+ PhysRegInfo Info = AnalyzePhysRegInBundle(*I, Reg, TRI);
// Defs happen after uses so they take precedence if both are present.
diff --git a/llvm/lib/CodeGen/MachineInstrBundle.cpp b/llvm/lib/CodeGen/MachineInstrBundle.cpp
index ac9393ba8ce8..94865b0e9031 100644
--- a/llvm/lib/CodeGen/MachineInstrBundle.cpp
+++ b/llvm/lib/CodeGen/MachineInstrBundle.cpp
@@ -308,20 +308,15 @@ VirtRegInfo llvm::AnalyzeVirtRegInBundle(
return RI;
}
-//===----------------------------------------------------------------------===//
-// MachineOperand iterator
-//===----------------------------------------------------------------------===//
-
-MachineOperandIteratorBase::PhysRegInfo
-MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
- const TargetRegisterInfo *TRI) {
+PhysRegInfo llvm::AnalyzePhysRegInBundle(const MachineInstr &MI, unsigned Reg,
+ const TargetRegisterInfo *TRI) {
bool AllDefsDead = true;
PhysRegInfo PRI = {false, false, false, false, false, false, false, false};
assert(Register::isPhysicalRegister(Reg) &&
"analyzePhysReg not given a physical register!");
- for (; isValid(); ++*this) {
- MachineOperand &MO = deref();
+ for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
+ const MachineOperand &MO = *O;
if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) {
PRI.Clobbered = true;
diff --git a/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp b/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
index da156d608417..054ef8f482ca 100644
--- a/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
@@ -352,8 +352,7 @@ MachineInstr *SSACCmpConv::findConvertibleCompare(MachineBasicBlock *MBB) {
}
// Check for flag reads and clobbers.
- MIOperands::PhysRegInfo PRI =
- MIOperands(*I).analyzePhysReg(AArch64::NZCV, TRI);
+ PhysRegInfo PRI = AnalyzePhysRegInBundle(*I, AArch64::NZCV, TRI);
if (PRI.Read) {
// The ccmp doesn't produce exactly the same flags as the original
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