[PATCH] D70680: [ARM][Thumb2] Fix ADD/SUB invalid writes to SP
Diogo N. Sampaio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 2 11:11:04 PST 2019
dnsampaio added a comment.
In D70680#1765493 <https://reviews.llvm.org/D70680#1765493>, @ostannard wrote:
> This looks like multiple bug-fixes in one patch, could they be split up?
Not that trivial, the `adr` bug only appears after splitting `t2(sub|add)ri`. And the hardcoded emission of t2 register +/- immediate needs to be fixed once we split the instructions for not emitting invalid instructions. As well the disassembly part fails if done apart.
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