[PATCH] D70881: [X86] Model MXCSR for all AVX512 instructions
Pengfei Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 2 02:14:26 PST 2019
pengfei added a comment.
Removed MXCSR and mayRaiseExceptions from SAE opcodes.
================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:1764
case X86::VCMPPSZ256rrik: {
- unsigned Imm = MI.getOperand(MI.getNumOperands() - 1).getImm() & 0x1f;
+ unsigned Imm = MI.getOperand(MI.getNumOperands() - 2).getImm() & 0x1f;
Imm = X86::getSwappedVCMPImm(Imm);
----------------
craig.topper wrote:
> Use getNumExplicitOperands() - 1 instead.
Thanks!
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70881/new/
https://reviews.llvm.org/D70881
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