[PATCH] D70871: AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def:35
+  PM_AGPR32 = 29,
+  PM_AGPR64 = 30,
+  PM_AGPR128 = 31,
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This is going to cause an annoying merge conflict with one of my patches. It would be nice to start finally having tablegen emit this


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:148-149
+  // There is no direct copy between AGPRs.
+  if (isVectorRegisterBank(Src) &&
+      isVectorRegisterBank(Dst))
+    return 4;
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Should just directly check if they are AGPR. This incorrectly covers VGPR copies?


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:2130
+
+
 ///
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Extra newline


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D70871/new/

https://reviews.llvm.org/D70871