[PATCH] D70881: [X86] Model MXCSR for all AVX512 instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

My biggest concern here is that the SAE and implicit rounding instructions are all marked as mayRaiseExceptions which is incorrect.



================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:1764
   case X86::VCMPPSZ256rrik: {
-    unsigned Imm = MI.getOperand(MI.getNumOperands() - 1).getImm() & 0x1f;
+    unsigned Imm = MI.getOperand(MI.getNumOperands() - 2).getImm() & 0x1f;
     Imm = X86::getSwappedVCMPImm(Imm);
----------------
Use getNumExplicitOperands() - 1 instead.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70881/new/

https://reviews.llvm.org/D70881