[PATCH] D70871: AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

You may be able to re-use the existing DAG select tests at this point?



================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def:35
   PM_SGPR96 = 24,
-  PM_VGPR96 = 25
+  PM_VGPR96 = 25,
+  PM_AGPR32 = 31,
----------------
I think a 96 bit one is needed for symmetry to legalize all the vector operations 


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:176
+  if (TRI->isSGPRClass(&RC))
+      return AMDGPU::SGPRRegBank;
+  else if (TRI->isAGPRClass(&RC))
----------------
Indented too much, and no else after return


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h:139
   bool isSALUMapping(const MachineInstr &MI) const;
+  bool isVectorRegisterBank(const RegisterBank &Bank) const;
+
----------------
This can be static


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https://reviews.llvm.org/D70871