[PATCH] D70795: [AArch64][SVE] Add intrinsics and patterns for logical predicate instructions

[Danilo Carvalho Grael via Phabricator via llvm-commits]

dancgr updated this revision to Diff 231572.
dancgr added a comment.

- [AArch64][SVE] Remove trailing backslash from test


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70795/new/

https://reviews.llvm.org/D70795

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-int-log-pred.ll
  llvm/test/CodeGen/AArch64/sve-int-log.ll
  llvm/test/CodeGen/AArch64/sve-pred-log.ll

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