[PATCH] D67348: [RISCV] Add codegen pattern matching for bit manipulation assembly instructions.

[Paolo Savini via Phabricator via llvm-commits]

PaoloS marked an inline comment as done.
PaoloS added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoB.td:510
+  def : Pat<(smin GPR:$rs1, GPR:$rs2), (MIN  GPR:$rs1, GPR:$rs2)>;
+  def : Pat<(riscv_selectcc GPR:$rs1, GPR:$rs2, (i32 20), GPR:$rs1, GPR:$rs2),
+            (MIN  GPR:$rs1, GPR:$rs2)>;
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edward-jones wrote:
> Is there a way to use a symbolic value for the CC here instead of the (i32 20) magic number? I notice that other backends appear to use "SETLT", "SETULT" and similar in their DAG patterns.
I thought that too, but if I use the symbolic name the pattern doesn't match. Instead the CC Constant is turned into a TargetConstant and the pattern is matched with a generic select with CC. It seems that at the early stage in which I apply the pattern recognition for min/max/minu/maxu the symbolic names SETLT, SETULT, SETEQ... don't match.


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  https://reviews.llvm.org/D67348/new/

https://reviews.llvm.org/D67348