[llvm] 31c25fa - AArch64: support the Apple NEON syntax for v8.2 crypto instructions.
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 27 03:09:13 PST 2019
Author: Tim Northover
Date: 2019-11-27T10:54:38Z
New Revision: 31c25fadccec0d5e5f0048b551b99f8976b87eb0
URL: https://github.com/llvm/llvm-project/commit/31c25fadccec0d5e5f0048b551b99f8976b87eb0
DIFF: https://github.com/llvm/llvm-project/commit/31c25fadccec0d5e5f0048b551b99f8976b87eb0.diff
LOG: AArch64: support the Apple NEON syntax for v8.2 crypto instructions.
Very simple change, just adding the extra syntax variant.
Added:
llvm/test/MC/AArch64/armv8.2a-crypto-apple.s
Modified:
llvm/lib/Target/AArch64/AArch64InstrFormats.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
index d6bf9bcd805c..5da790c84617 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -10407,9 +10407,9 @@ class CryptoRRTied<bits<1>op0, bits<2>op1, string asm, string asmops>
let Inst{11-10} = op1;
}
class CryptoRRTied_2D<bits<1>op0, bits<2>op1, string asm>
- : CryptoRRTied<op0, op1, asm, "{\t$Vd.2d, $Vn.2d}">;
+ : CryptoRRTied<op0, op1, asm, "{\t$Vd.2d, $Vn.2d|.2d\t$Vd, $Vn}">;
class CryptoRRTied_4S<bits<1>op0, bits<2>op1, string asm>
- : CryptoRRTied<op0, op1, asm, "{\t$Vd.4s, $Vn.4s}">;
+ : CryptoRRTied<op0, op1, asm, "{\t$Vd.4s, $Vn.4s|.4s\t$Vd, $Vn}">;
class CryptoRRR<bits<1> op0, bits<2>op1, dag oops, dag iops, string asm,
string asmops, string cst>
@@ -10424,19 +10424,19 @@ class CryptoRRR<bits<1> op0, bits<2>op1, dag oops, dag iops, string asm,
}
class CryptoRRR_2D<bits<1> op0, bits<2>op1, string asm>
: CryptoRRR<op0, op1, (outs V128:$Vd), (ins V128:$Vn, V128:$Vm), asm,
- "{\t$Vd.2d, $Vn.2d, $Vm.2d}", "">;
+ "{\t$Vd.2d, $Vn.2d, $Vm.2d|.2d\t$Vd, $Vn, $Vm}", "">;
class CryptoRRRTied_2D<bits<1> op0, bits<2>op1, string asm>
: CryptoRRR<op0, op1, (outs V128:$Vdst), (ins V128:$Vd, V128:$Vn, V128:$Vm), asm,
- "{\t$Vd.2d, $Vn.2d, $Vm.2d}", "$Vd = $Vdst">;
+ "{\t$Vd.2d, $Vn.2d, $Vm.2d|.2d\t$Vd, $Vn, $Vm}", "$Vd = $Vdst">;
class CryptoRRR_4S<bits<1> op0, bits<2>op1, string asm>
: CryptoRRR<op0, op1, (outs V128:$Vd), (ins V128:$Vn, V128:$Vm), asm,
- "{\t$Vd.4s, $Vn.4s, $Vm.4s}", "">;
+ "{\t$Vd.4s, $Vn.4s, $Vm.4s|.4s\t$Vd, $Vn, $Vm}", "">;
class CryptoRRRTied_4S<bits<1> op0, bits<2>op1, string asm>
: CryptoRRR<op0, op1, (outs V128:$Vdst), (ins V128:$Vd, V128:$Vn, V128:$Vm), asm,
- "{\t$Vd.4s, $Vn.4s, $Vm.4s}", "$Vd = $Vdst">;
+ "{\t$Vd.4s, $Vn.4s, $Vm.4s|.4s\t$Vd, $Vn, $Vm}", "$Vd = $Vdst">;
class CryptoRRRTied<bits<1> op0, bits<2>op1, string asm>
: CryptoRRR<op0, op1, (outs FPR128:$Vdst), (ins FPR128:$Vd, FPR128:$Vn, V128:$Vm),
- asm, "{\t$Vd, $Vn, $Vm.2d}", "$Vd = $Vdst">;
+ asm, "{\t$Vd, $Vn, $Vm.2d|.2d\t$Vd, $Vn, $Vm}", "$Vd = $Vdst">;
class CryptoRRRR<bits<2>op0, string asm, string asmops>
: BaseCryptoV82<(outs V128:$Vd), (ins V128:$Vn, V128:$Vm, V128:$Va), asm,
@@ -10450,15 +10450,18 @@ class CryptoRRRR<bits<2>op0, string asm, string asmops>
let Inst{14-10} = Va;
}
class CryptoRRRR_16B<bits<2>op0, string asm>
- : CryptoRRRR<op0, asm, "{\t$Vd.16b, $Vn.16b, $Vm.16b, $Va.16b}"> {
+ : CryptoRRRR<op0, asm, "{\t$Vd.16b, $Vn.16b, $Vm.16b, $Va.16b" #
+ "|.16b\t$Vd, $Vn, $Vm, $Va}"> {
}
class CryptoRRRR_4S<bits<2>op0, string asm>
- : CryptoRRRR<op0, asm, "{\t$Vd.4s, $Vn.4s, $Vm.4s, $Va.4s}"> {
+ : CryptoRRRR<op0, asm, "{\t$Vd.4s, $Vn.4s, $Vm.4s, $Va.4s" #
+ "|.4s\t$Vd, $Vn, $Vm, $Va}"> {
}
class CryptoRRRi6<string asm>
: BaseCryptoV82<(outs V128:$Vd), (ins V128:$Vn, V128:$Vm, uimm6:$imm), asm,
- "{\t$Vd.2d, $Vn.2d, $Vm.2d, $imm}", "", []> {
+ "{\t$Vd.2d, $Vn.2d, $Vm.2d, $imm" #
+ "|.2d\t$Vd, $Vn, $Vm, $imm}", "", []> {
bits<6> imm;
bits<5> Vm;
let Inst{24-21} = 0b0100;
@@ -10471,7 +10474,8 @@ class CryptoRRRi6<string asm>
class CryptoRRRi2Tied<bits<1>op0, bits<2>op1, string asm>
: BaseCryptoV82<(outs V128:$Vdst),
(ins V128:$Vd, V128:$Vn, V128:$Vm, VectorIndexS:$imm),
- asm, "{\t$Vd.4s, $Vn.4s, $Vm.s$imm}", "$Vd = $Vdst", []> {
+ asm, "{\t$Vd.4s, $Vn.4s, $Vm.s$imm" #
+ "|.4s\t$Vd, $Vn, $Vm$imm}", "$Vd = $Vdst", []> {
bits<2> imm;
bits<5> Vm;
let Inst{24-21} = 0b0010;
diff --git a/llvm/test/MC/AArch64/armv8.2a-crypto-apple.s b/llvm/test/MC/AArch64/armv8.2a-crypto-apple.s
new file mode 100644
index 000000000000..1b9153136d05
--- /dev/null
+++ b/llvm/test/MC/AArch64/armv8.2a-crypto-apple.s
@@ -0,0 +1,41 @@
+// RUN: llvm-mc -output-asm-variant=1 -triple aarch64-apple-ios -mattr=+sha3,+sm4 -show-encoding < %s | FileCheck %s
+
+ sha512h.2d q0, q1, v2
+ sha512h2.2d q0, q1, v2
+ sha512su0.2d v11, v12
+ sha512su1.2d v11, v13, v14
+ eor3.16b v25, v12, v7, v2
+ rax1.2d v30, v29, v26
+ xar.2d v26, v21, v27, #63
+ bcax.16b v31, v26, v2, v1
+
+//CHECK: sha512h.2d q0, q1, v2 ; encoding: [0x20,0x80,0x62,0xce]
+//CHECK: sha512h2.2d q0, q1, v2 ; encoding: [0x20,0x84,0x62,0xce]
+//CHECK: sha512su0.2d v11, v12 ; encoding: [0x8b,0x81,0xc0,0xce]
+//CHECK: sha512su1.2d v11, v13, v14 ; encoding: [0xab,0x89,0x6e,0xce]
+//CHECK: eor3.16b v25, v12, v7, v2 ; encoding: [0x99,0x09,0x07,0xce]
+//CHECK: rax1.2d v30, v29, v26 ; encoding: [0xbe,0x8f,0x7a,0xce]
+//CHECK: xar.2d v26, v21, v27, #63 ; encoding: [0xba,0xfe,0x9b,0xce]
+//CHECK: bcax.16b v31, v26, v2, v1 ; encoding: [0x5f,0x07,0x22,0xce]
+
+
+
+ sm3ss1.4s v20, v23, v21, v22
+ sm3tt1a.4s v20, v23, v21[3]
+ sm3tt1b.4s v20, v23, v21[3]
+ sm3tt2a.4s v20, v23, v21[3]
+ sm3tt2b.4s v20, v23, v21[3]
+ sm3partw1.4s v30, v29, v26
+ sm3partw2.4s v30, v29, v26
+ sm4ekey.4s v11, v11, v19
+ sm4e.4s v2, v15
+
+// CHECK: sm3ss1.4s v20, v23, v21, v22 ; encoding: [0xf4,0x5a,0x55,0xce]
+// CHECK: sm3tt1a.4s v20, v23, v21[3] ; encoding: [0xf4,0xb2,0x55,0xce]
+// CHECK: sm3tt1b.4s v20, v23, v21[3] ; encoding: [0xf4,0xb6,0x55,0xce]
+// CHECK: sm3tt2a.4s v20, v23, v21[3] ; encoding: [0xf4,0xba,0x55,0xce]
+// CHECK: sm3tt2b.4s v20, v23, v21[3] ; encoding: [0xf4,0xbe,0x55,0xce]
+// CHECK: sm3partw1.4s v30, v29, v26 ; encoding: [0xbe,0xc3,0x7a,0xce]
+// CHECK: sm3partw2.4s v30, v29, v26 ; encoding: [0xbe,0xc7,0x7a,0xce]
+// CHECK: sm4ekey.4s v11, v11, v19 ; encoding: [0x6b,0xc9,0x73,0xce]
+// CHECK: sm4e.4s v2, v15 ; encoding: [0xe2,0x85,0xc0,0xce]
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