[PATCH] D70758: [PowerPC][NFC] Rename record instructions to use r suffix instead of o

Jinsong Ji via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 26 19:02:18 PST 2019


jsji created this revision.
jsji added reviewers: PowerPC, hfinkel, nemanjai, lei, steven.zhang, echristo, jhibbits, kamaub.
Herald added subscribers: llvm-commits, shchenz, kbarton, hiraditya.
Herald added a project: LLVM.

We use o suffix to indicate record form instuctions,
(as it is similar to dot '.' in mne?)

This was fine before, as we did not support XO-form.
However, with https://reviews.llvm.org/D66902,
we now have XO-form support.

It becomes confusing now to still use 'o' for record form,
and it is weird to have something like 'Oo' .

This patch rename all 'o' instructions to use 'r' instead.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D70758

Files:
  llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  llvm/lib/Target/PowerPC/P9InstrResources.td
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrAltivec.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  llvm/test/CodeGen/PowerPC/block-placement.mir
  llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir
  llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
  llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir
  llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
  llvm/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir
  llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir
  llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir

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