[PATCH] D70648: [mips] Fix sc, scs, ll, lld instructions expanding

Tue Nov 26 04:24:29 PST 2019

Petar.Avramovic accepted this revision.
Petar.Avramovic added a comment.
This revision is now accepted and ready to land.

LGTM.

================
Comment at: llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3745
+
+      if (ABI.ArePtrs64bit() && isGP64bit()) {
+        MCOperand HighestOperand = MCOperand::createExpr(
----------------
isGP64bit() feel more like an assert here or in ArePtrs64bit().
`ABI.ArePtrs64bit() ? Mips::DADDu : Mips::ADDu` implies that gpr are 64 bit when pointers are 64.
Flags: `llvm-mc -triple mips64el -mattr=-gp64 ...` make subtarget with N64 and no gp64, and this works like O32?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70648/new/

https://reviews.llvm.org/D70648