[PATCH] D70501: [SystemZ] Don't build a PPA instruction with an immediate 0

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa updated this revision to Diff 231023.
jonpa added a comment.

SystemZInstPrinter::printOperand() prints '0' for NoRegister generally instead of the PPA special handling.

This is NFC, with the only difference that the PPA second register operand now is NoRegister instead of immediate 0 in the MIR.

> Right now I don't think this crash is a reliable check anyway -- e.g. if you directly emit machine code (not assembler text), you won't get a crash either.

OK, that makes sense...

> (Another interesting question is whether our AsmParser will actually correctly read back and accept "0" in a register slot ... we should probably test this as well.)

No, it can't:

  llvm-mc -mcpu=zEC12 out.s --show-encoding
  out.s:403:11: error: invalid operand for instruction
          ppa     %r2, 0, 1
                               ^

SystemZAsmParser::parseGR64() does not handle raw register numbers, it seems.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70501/new/

https://reviews.llvm.org/D70501

Files:
  llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
  llvm/lib/Target/SystemZ/SystemZInstrInfo.td


Index: llvm/lib/Target/SystemZ/SystemZInstrInfo.td
===================================================================
--- llvm/lib/Target/SystemZ/SystemZInstrInfo.td
+++ llvm/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -2069,7 +2069,7 @@
     def PPA : SideEffectTernaryRRFc<"ppa", 0xB2E8, GR64, GR64, imm32zx4>;
   def : Pat<(int_s390_ppa_txassist GR32:$src),
             (PPA (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR32:$src, subreg_l32),
-                 0, 1)>;
+                 zero_reg, 1)>;
 }
 
 //===----------------------------------------------------------------------===//
Index: llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
===================================================================
--- llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
+++ llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
@@ -41,8 +41,12 @@
 
 void SystemZInstPrinter::printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
                                       raw_ostream &O) {
-  if (MO.isReg())
-    O << '%' << getRegisterName(MO.getReg());
+  if (MO.isReg()) {
+    if (!MO.getReg())
+      O << '0';
+    else
+      O << '%' << getRegisterName(MO.getReg());
+  }
   else if (MO.isImm())
     O << MO.getImm();
   else if (MO.isExpr())


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