[PATCH] D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86

[Ulrich Weigand via Phabricator via llvm-commits]

uweigand added a comment.

@pengfei : I've updated the D69281 <https://reviews.llvm.org/D69281> patch, which will require follow-on changes here.  In particular, signaling comparisons (STRICT_FSETCCS) need to be handled.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3577
     EVT VT = Node->getValueType(0);
+    SDValue Chain;
     SDValue CC = Node->getOperand(4);
----------------
I guess this needs an input chain, right?   I think you'll probably have to add a whole new STRICT_FSELECT_CC node to get this right ...


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3648
   case ISD::BR_CC: {
+    SDValue Chain;
     Tmp1 = Node->getOperand(0);              // Chain
----------------
Similarly here, although BR_CC of course already has a chain.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2795
     break;
+  case ISD::STRICT_FSETCC:
+    // If we know the result of a setcc has the top bits zero, use this info.
----------------
This is now already done in my base patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70582/new/

https://reviews.llvm.org/D70582