[llvm] 1de788a - [mips] Split test into MIPS and microMIPS parts. NFC

Simon Atanasyan via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 24 13:19:56 PST 2019


Author: Simon Atanasyan
Date: 2019-11-25T00:19:31+03:00
New Revision: 1de788a1f16eeb3c2a4f8bffb63809c0f22600f3

URL: https://github.com/llvm/llvm-project/commit/1de788a1f16eeb3c2a4f8bffb63809c0f22600f3
DIFF: https://github.com/llvm/llvm-project/commit/1de788a1f16eeb3c2a4f8bffb63809c0f22600f3.diff

LOG: [mips] Split test into MIPS and microMIPS parts. NFC

Added: 
    llvm/test/MC/Mips/micromips-sc-expansion.s

Modified: 
    llvm/test/MC/Mips/sc-expansion.s

Removed: 
    


################################################################################
diff  --git a/llvm/test/MC/Mips/micromips-sc-expansion.s b/llvm/test/MC/Mips/micromips-sc-expansion.s
new file mode 100644
index 000000000000..1bafc3a55ea8
--- /dev/null
+++ b/llvm/test/MC/Mips/micromips-sc-expansion.s
@@ -0,0 +1,34 @@
+# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips32r2 -mattr=+micromips %s -o - \
+# RUN:   | llvm-objdump -d -r - | FileCheck %s --check-prefix=MICROMIPSR2
+# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips32r6 -mattr=+micromips %s -o - \
+# RUN:   | llvm-objdump -d -r - | FileCheck %s --check-prefix=MICROMIPSR6
+
+# MICROMIPSR2:  61 83 b0 00    sc   $12, 0($3)
+# MICROMIPSR6:  61 83 b0 00    sc   $12, 0($3)
+sc $12, 0($3)
+
+# MICROMIPSR2:  61 83 b0 04    sc   $12, 4($3)
+# MICROMIPSR6:  61 83 b0 04    sc   $12, 4($3)
+sc $12, 4($3)
+
+# MICROMIPSR2:  41 a1 00 00    lui  $1, 0
+# MICROMIPSR2:             R_MICROMIPS_HI16  symbol
+# MICROMIPSR2:  61 81 b0 00    sc   $12, 0($1)
+# MICROMIPSR2:             R_MICROMIPS_LO16  symbol
+
+# MICROMIPSR6:  3c 01 00 00    lh   $zero, 0($1)
+# MICROMIPSR6:             R_MICROMIPS_HI16  symbol
+# MICROMIPSR6:  61 81 b0 00    sc   $12, 0($1)
+# MICROMIPSR6:             R_MICROMIPS_LO16  symbol
+sc $12, symbol
+
+# MICROMIPSR2:  41 a1 00 00    lui  $1, 0
+# MICROMIPSR2:             R_MICROMIPS_HI16  symbol
+# MICROMIPSR2:  61 81 b0 08    sc   $12, 8($1)
+# MICROMIPSR2:             R_MICROMIPS_LO16  symbol
+
+# MICROMIPSR6:  3c 01 00 00    lh   $zero, 0($1)
+# MICROMIPSR6:             R_MICROMIPS_HI16  symbol
+# MICROMIPSR6:  61 81 b0 08    sc   $12, 8($1)
+# MICROMIPSR6:             R_MICROMIPS_LO16  symbol
+sc $12, symbol + 8

diff  --git a/llvm/test/MC/Mips/sc-expansion.s b/llvm/test/MC/Mips/sc-expansion.s
index 023e5017e333..76b30f174f9e 100644
--- a/llvm/test/MC/Mips/sc-expansion.s
+++ b/llvm/test/MC/Mips/sc-expansion.s
@@ -14,19 +14,13 @@
 # RUN:   | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPSR6
 # RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips64r6 %s -o - \
 # RUN:   | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPSR6
-# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips32r2 -mattr=+micromips %s -o - \
-# RUN:   | llvm-objdump -d -r - | FileCheck %s --check-prefixes=MICROMIPS,MICROMIPSR2
-# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips32r6 -mattr=+micromips %s -o - \
-# RUN:   | llvm-objdump -d -r - | FileCheck %s --check-prefixes=MICROMIPS,MICROMIPSR6
 
 # MIPS:         e0 6c 00 00    sc   $12, 0($3)
 # MIPSR6:       7c 6c 00 26    sc   $12, 0($3)
-# MICROMIPS:    61 83 b0 00    sc   $12, 0($3)
 sc $12, 0($3)
 
 # MIPS:         e0 6c 00 04    sc   $12, 4($3)
 # MIPSR6:       7c 6c 02 26    sc   $12, 4($3)
-# MICROMIPS:    61 83 b0 04    sc   $12, 4($3)
 sc $12, 4($3)
 
 # MIPS:         3c 01 00 00    lui  $1, 0
@@ -39,16 +33,6 @@ sc $12, 4($3)
 # MIPSR6:       24 21 00 00     addiu  $1, $1, 0
 # MIPSR6:			             R_MIPS_LO16	symbol
 # MIPSR6:       7c 2c 00 26     sc     $12, 0($1)
-
-# MICROMIPSR2:  41 a1 00 00    lui  $1, 0
-# MICROMIPSR2:             R_MICROMIPS_HI16  symbol
-# MICROMIPSR2:  61 81 b0 00    sc   $12, 0($1)
-# MICROMIPSR2:             R_MICROMIPS_LO16  symbol
-
-# MICROMIPSR6:  3c 01 00 00    lh   $zero, 0($1)
-# MICROMIPSR6:             R_MICROMIPS_HI16  symbol
-# MICROMIPSR6:  61 81 b0 00    sc   $12, 0($1)
-# MICROMIPSR6:             R_MICROMIPS_LO16  symbol
 sc $12, symbol
 
 # MIPS:         3c 01 00 00    lui  $1, 0
@@ -61,14 +45,4 @@ sc $12, symbol
 # MIPSR6:       24 21 00 08     addiu  $1, $1, 8
 # MIPSR6:                  R_MIPS_LO16	symbol
 # MIPSR6:       7c 2c 00 26     sc     $12, 0($1)
-
-# MICROMIPSR2:  41 a1 00 00    lui  $1, 0
-# MICROMIPSR2:             R_MICROMIPS_HI16  symbol
-# MICROMIPSR2:  61 81 b0 08    sc   $12, 8($1)
-# MICROMIPSR2:             R_MICROMIPS_LO16  symbol
-
-# MICROMIPSR6:  3c 01 00 00    lh   $zero, 0($1)
-# MICROMIPSR6:             R_MICROMIPS_HI16  symbol
-# MICROMIPSR6:  61 81 b0 08    sc   $12, 8($1)
-# MICROMIPSR6:             R_MICROMIPS_LO16  symbol
 sc $12, symbol + 8


        


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