[PATCH] D70407: [ARM] Generate CMSE instructions from CMSE intrinsics
Momchil Velikov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 22 06:14:48 PST 2019
chill added a comment.
In D70407#1754833 <https://reviews.llvm.org/D70407#1754833>, @sigvartmh wrote:
> Question: Is this sufficient to generate code which sets the processor into non-secure handler/thread mode? I'm fine with not having everything clean up all the registeres etc. I'm just going to use it for testing purposes at the moment to prepare a build system to handle llvm as a back-end for ARMv8-m.
No, this is not enough. In the incoming patches, the only mode-change relevant things would be CMSE entry functions returning via `BXNS`, and calling
non-secure functions via `BLXNS`, other than that, I would think setting the execution mode is out of the scope of the compiler.
The assembly support should be compete already, though.
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https://reviews.llvm.org/D70407/new/
https://reviews.llvm.org/D70407
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