[llvm] b25f985 - [DAGCombiner] Use the right thumbv7meb triple for ARM big-endian test.
Clement Courbet via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 21 06:07:49 PST 2019
Author: Clement Courbet
Date: 2019-11-21T15:07:35+01:00
New Revision: b25f985848767f36dcdcbac213ddb03bcdab617a
URL: https://github.com/llvm/llvm-project/commit/b25f985848767f36dcdcbac213ddb03bcdab617a
DIFF: https://github.com/llvm/llvm-project/commit/b25f985848767f36dcdcbac213ddb03bcdab617a.diff
LOG: [DAGCombiner] Use the right thumbv7meb triple for ARM big-endian test.
Added:
Modified:
llvm/test/CodeGen/ARM/load-combine-big-endian.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/ARM/load-combine-big-endian.ll b/llvm/test/CodeGen/ARM/load-combine-big-endian.ll
index 7b028714f4fd..d045f1f96ee3 100644
--- a/llvm/test/CodeGen/ARM/load-combine-big-endian.ll
+++ b/llvm/test/CodeGen/ARM/load-combine-big-endian.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=armeb-unknown | FileCheck %s
; RUN: llc < %s -mtriple=armv6eb-unknown | FileCheck %s --check-prefix=CHECK-ARMv6
-; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv6
-; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv7
+; RUN: llc < %s -mtriple=thumbv6meb-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv6
+; RUN: llc < %s -mtriple=thumbv6meb-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv7
; i8* p; // p is 4 byte aligned
; ((i32) p[0] << 24) | ((i32) p[1] << 16) | ((i32) p[2] << 8) | (i32) p[3]
@@ -20,13 +20,11 @@ define i32 @load_i32_by_i8_big_endian(i32* %arg) {
; CHECK-THUMBv6-LABEL: load_i32_by_i8_big_endian:
; CHECK-THUMBv6: @ %bb.0:
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
-; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i8_big_endian:
; CHECK-THUMBv7: @ %bb.0:
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
-; CHECK-THUMBv7-NEXT: rev r0, r0
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -75,11 +73,13 @@ define i32 @load_i32_by_i8_bswap(i32* %arg) {
; CHECK-THUMBv6-LABEL: load_i32_by_i8_bswap:
; CHECK-THUMBv6: @ %bb.0:
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
+; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i8_bswap:
; CHECK-THUMBv7: @ %bb.0:
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
+; CHECK-THUMBv7-NEXT: rev r0, r0
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -120,13 +120,11 @@ define i32 @load_i32_by_i16_by_i8_big_endian(i32* %arg) {
; CHECK-THUMBv6-LABEL: load_i32_by_i16_by_i8_big_endian:
; CHECK-THUMBv6: @ %bb.0:
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
-; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i16_by_i8_big_endian:
; CHECK-THUMBv7: @ %bb.0:
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
-; CHECK-THUMBv7-NEXT: rev r0, r0
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -167,20 +165,12 @@ define i32 @load_i32_by_i16(i32* %arg) {
;
; CHECK-THUMBv6-LABEL: load_i32_by_i16:
; CHECK-THUMBv6: @ %bb.0:
-; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #2]
-; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #3]
-; CHECK-THUMBv6-NEXT: lsls r2, r2, #8
-; CHECK-THUMBv6-NEXT: adds r1, r2, r1
-; CHECK-THUMBv6-NEXT: ldrh r0, [r0]
-; CHECK-THUMBv6-NEXT: lsls r0, r0, #16
-; CHECK-THUMBv6-NEXT: adds r0, r0, r1
+; CHECK-THUMBv6-NEXT: ldr r0, [r0]
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i16:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrh r1, [r0]
-; CHECK-THUMBv7-NEXT: ldrh r0, [r0, #2]
-; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT: ldr r0, [r0]
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i16*
@@ -210,22 +200,12 @@ define i32 @load_i32_by_i16_i8(i32* %arg) {
;
; CHECK-THUMBv6-LABEL: load_i32_by_i16_i8:
; CHECK-THUMBv6: @ %bb.0:
-; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #3]
-; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #2]
-; CHECK-THUMBv6-NEXT: lsls r2, r2, #8
-; CHECK-THUMBv6-NEXT: adds r1, r2, r1
-; CHECK-THUMBv6-NEXT: ldrh r0, [r0]
-; CHECK-THUMBv6-NEXT: lsls r0, r0, #16
-; CHECK-THUMBv6-NEXT: adds r0, r1, r0
+; CHECK-THUMBv6-NEXT: ldr r0, [r0]
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i16_i8:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrb r2, [r0, #2]
-; CHECK-THUMBv7-NEXT: ldrh r1, [r0]
-; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #3]
-; CHECK-THUMBv7-NEXT: orr.w r0, r0, r2, lsl #8
-; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT: ldr r0, [r0]
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i16*
@@ -277,14 +257,18 @@ define i64 @load_i64_by_i8_bswap(i64* %arg) {
;
; CHECK-THUMBv6-LABEL: load_i64_by_i8_bswap:
; CHECK-THUMBv6: @ %bb.0:
-; CHECK-THUMBv6-NEXT: ldr r2, [r0]
-; CHECK-THUMBv6-NEXT: ldr r1, [r0, #4]
-; CHECK-THUMBv6-NEXT: mov r0, r2
+; CHECK-THUMBv6-NEXT: ldr r1, [r0]
+; CHECK-THUMBv6-NEXT: ldr r0, [r0, #4]
+; CHECK-THUMBv6-NEXT: rev r0, r0
+; CHECK-THUMBv6-NEXT: rev r1, r1
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i64_by_i8_bswap:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrd r0, r1, [r0]
+; CHECK-THUMBv7-NEXT: ldr r1, [r0]
+; CHECK-THUMBv7-NEXT: ldr r0, [r0, #4]
+; CHECK-THUMBv7-NEXT: rev r0, r0
+; CHECK-THUMBv7-NEXT: rev r1, r1
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i64* %arg to i8*
@@ -345,17 +329,16 @@ define i64 @load_i64_by_i8(i64* %arg) {
;
; CHECK-THUMBv6-LABEL: load_i64_by_i8:
; CHECK-THUMBv6: @ %bb.0:
-; CHECK-THUMBv6-NEXT: ldr r1, [r0]
-; CHECK-THUMBv6-NEXT: ldr r0, [r0, #4]
-; CHECK-THUMBv6-NEXT: rev r0, r0
-; CHECK-THUMBv6-NEXT: rev r1, r1
+; CHECK-THUMBv6-NEXT: ldr r2, [r0]
+; CHECK-THUMBv6-NEXT: ldr r1, [r0, #4]
+; CHECK-THUMBv6-NEXT: mov r0, r2
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i64_by_i8:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrd r1, r0, [r0]
-; CHECK-THUMBv7-NEXT: rev r0, r0
-; CHECK-THUMBv7-NEXT: rev r1, r1
+; CHECK-THUMBv7-NEXT: ldr r2, [r0]
+; CHECK-THUMBv7-NEXT: ldr r1, [r0, #4]
+; CHECK-THUMBv7-NEXT: mov r0, r2
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i64* %arg to i8*
@@ -424,11 +407,14 @@ define i32 @load_i32_by_i8_nonzero_offset(i32* %arg) {
; CHECK-THUMBv6: @ %bb.0:
; CHECK-THUMBv6-NEXT: movs r1, #1
; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]
+; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #1]
+; CHECK-THUMBv7-NEXT: movs r1, #1
+; CHECK-THUMBv7-NEXT: ldr r0, [r0, r1]
+; CHECK-THUMBv7-NEXT: rev r0, r0
; CHECK-THUMBv7-NEXT: bx lr
@@ -479,11 +465,14 @@ define i32 @load_i32_by_i8_neg_offset(i32* %arg) {
; CHECK-THUMBv6: @ %bb.0:
; CHECK-THUMBv6-NEXT: subs r0, r0, #4
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
+; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldr r0, [r0, #-4]
+; CHECK-THUMBv7-NEXT: subs r0, r0, #4
+; CHECK-THUMBv7-NEXT: ldr r0, [r0]
+; CHECK-THUMBv7-NEXT: rev r0, r0
; CHECK-THUMBv7-NEXT: bx lr
@@ -526,13 +515,12 @@ define i32 @load_i32_by_i8_nonzero_offset_bswap(i32* %arg) {
; CHECK-THUMBv6: @ %bb.0:
; CHECK-THUMBv6-NEXT: movs r1, #1
; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]
-; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset_bswap:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #1]
-; CHECK-THUMBv7-NEXT: rev r0, r0
+; CHECK-THUMBv7-NEXT: movs r1, #1
+; CHECK-THUMBv7-NEXT: ldr r0, [r0, r1]
; CHECK-THUMBv7-NEXT: bx lr
@@ -575,13 +563,12 @@ define i32 @load_i32_by_i8_neg_offset_bswap(i32* %arg) {
; CHECK-THUMBv6: @ %bb.0:
; CHECK-THUMBv6-NEXT: subs r0, r0, #4
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
-; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset_bswap:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldr r0, [r0, #-4]
-; CHECK-THUMBv7-NEXT: rev r0, r0
+; CHECK-THUMBv7-NEXT: subs r0, r0, #4
+; CHECK-THUMBv7-NEXT: ldr r0, [r0]
; CHECK-THUMBv7-NEXT: bx lr
@@ -632,27 +619,14 @@ define i32 @load_i32_by_bswap_i16(i32* %arg) {
;
; CHECK-THUMBv6-LABEL: load_i32_by_bswap_i16:
; CHECK-THUMBv6: @ %bb.0:
-; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #2]
-; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #3]
-; CHECK-THUMBv6-NEXT: lsls r2, r2, #8
-; CHECK-THUMBv6-NEXT: adds r1, r2, r1
-; CHECK-THUMBv6-NEXT: rev r1, r1
-; CHECK-THUMBv6-NEXT: lsrs r1, r1, #16
-; CHECK-THUMBv6-NEXT: lsls r1, r1, #16
-; CHECK-THUMBv6-NEXT: ldrh r0, [r0]
-; CHECK-THUMBv6-NEXT: rev16 r0, r0
-; CHECK-THUMBv6-NEXT: adds r0, r1, r0
+; CHECK-THUMBv6-NEXT: ldr r0, [r0]
+; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_bswap_i16:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrh r1, [r0, #2]
-; CHECK-THUMBv7-NEXT: movw r2, #65535
-; CHECK-THUMBv7-NEXT: ldrh r0, [r0]
-; CHECK-THUMBv7-NEXT: rev r1, r1
+; CHECK-THUMBv7-NEXT: ldr r0, [r0]
; CHECK-THUMBv7-NEXT: rev r0, r0
-; CHECK-THUMBv7-NEXT: bics r1, r2
-; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsr #16
; CHECK-THUMBv7-NEXT: bx lr
@@ -684,20 +658,12 @@ define i32 @load_i32_by_sext_i16(i32* %arg) {
;
; CHECK-THUMBv6-LABEL: load_i32_by_sext_i16:
; CHECK-THUMBv6: @ %bb.0:
-; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #2]
-; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #3]
-; CHECK-THUMBv6-NEXT: lsls r2, r2, #8
-; CHECK-THUMBv6-NEXT: adds r1, r2, r1
-; CHECK-THUMBv6-NEXT: ldrh r0, [r0]
-; CHECK-THUMBv6-NEXT: lsls r0, r0, #16
-; CHECK-THUMBv6-NEXT: adds r0, r0, r1
+; CHECK-THUMBv6-NEXT: ldr r0, [r0]
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_sext_i16:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrh r1, [r0]
-; CHECK-THUMBv7-NEXT: ldrh r0, [r0, #2]
-; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT: ldr r0, [r0]
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i16*
%tmp1 = load i16, i16* %tmp, align 4
@@ -738,12 +704,14 @@ define i32 @load_i32_by_i8_base_offset_index(i8* %arg, i32 %i) {
; CHECK-THUMBv6: @ %bb.0:
; CHECK-THUMBv6-NEXT: adds r0, r0, r1
; CHECK-THUMBv6-NEXT: ldr r0, [r0, #12]
+; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: add r0, r1
+; CHECK-THUMBv7-NEXT: adds r0, r0, r1
; CHECK-THUMBv7-NEXT: ldr r0, [r0, #12]
+; CHECK-THUMBv7-NEXT: rev r0, r0
; CHECK-THUMBv7-NEXT: bx lr
%tmp = add nuw nsw i32 %i, 3
%tmp2 = add nuw nsw i32 %i, 2
@@ -803,12 +771,15 @@ define i32 @load_i32_by_i8_base_offset_index_2(i8* %arg, i32 %i) {
; CHECK-THUMBv6-NEXT: adds r0, r1, r0
; CHECK-THUMBv6-NEXT: movs r1, #13
; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]
+; CHECK-THUMBv6-NEXT: rev r0, r0
; CHECK-THUMBv6-NEXT: bx lr
;
; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index_2:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: add r0, r1
-; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #13]
+; CHECK-THUMBv7-NEXT: adds r0, r1, r0
+; CHECK-THUMBv7-NEXT: movs r1, #13
+; CHECK-THUMBv7-NEXT: ldr r0, [r0, r1]
+; CHECK-THUMBv7-NEXT: rev r0, r0
; CHECK-THUMBv7-NEXT: bx lr
%tmp = add nuw nsw i32 %i, 4
@@ -870,7 +841,8 @@ define i32 @zext_load_i32_by_i8(i32* %arg) {
; CHECK-THUMBv7: @ %bb.0:
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
-; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsl #8
+; CHECK-THUMBv7-NEXT: lsls r0, r0, #8
+; CHECK-THUMBv7-NEXT: adds r0, r0, r1
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -916,9 +888,10 @@ define i32 @zext_load_i32_by_i8_shl_8(i32* %arg) {
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_8:
; CHECK-THUMBv7: @ %bb.0:
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT: lsls r1, r1, #8
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
; CHECK-THUMBv7-NEXT: lsls r0, r0, #16
-; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #8
+; CHECK-THUMBv7-NEXT: adds r0, r0, r1
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -965,9 +938,10 @@ define i32 @zext_load_i32_by_i8_shl_16(i32* %arg) {
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_16:
; CHECK-THUMBv7: @ %bb.0:
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
+; CHECK-THUMBv7-NEXT: lsls r1, r1, #16
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
; CHECK-THUMBv7-NEXT: lsls r0, r0, #24
-; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16
+; CHECK-THUMBv7-NEXT: adds r0, r0, r1
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -1010,9 +984,10 @@ define i32 @zext_load_i32_by_i8_bswap(i32* %arg) {
;
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
-; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
-; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #8
+; CHECK-THUMBv7-NEXT: ldrb r1, [r0, #1]
+; CHECK-THUMBv7-NEXT: ldrb r0, [r0]
+; CHECK-THUMBv7-NEXT: lsls r0, r0, #8
+; CHECK-THUMBv7-NEXT: adds r0, r0, r1
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -1057,10 +1032,11 @@ define i32 @zext_load_i32_by_i8_bswap_shl_8(i32* %arg) {
;
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_8:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
-; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
-; CHECK-THUMBv7-NEXT: lsls r1, r1, #16
-; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsl #8
+; CHECK-THUMBv7-NEXT: ldrb r1, [r0, #1]
+; CHECK-THUMBv7-NEXT: lsls r1, r1, #8
+; CHECK-THUMBv7-NEXT: ldrb r0, [r0]
+; CHECK-THUMBv7-NEXT: lsls r0, r0, #16
+; CHECK-THUMBv7-NEXT: adds r0, r0, r1
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -1106,10 +1082,11 @@ define i32 @zext_load_i32_by_i8_bswap_shl_16(i32* %arg) {
;
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_16:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
-; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
-; CHECK-THUMBv7-NEXT: lsls r1, r1, #24
-; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsl #16
+; CHECK-THUMBv7-NEXT: ldrb r1, [r0, #1]
+; CHECK-THUMBv7-NEXT: lsls r1, r1, #16
+; CHECK-THUMBv7-NEXT: ldrb r0, [r0]
+; CHECK-THUMBv7-NEXT: lsls r0, r0, #24
+; CHECK-THUMBv7-NEXT: adds r0, r0, r1
; CHECK-THUMBv7-NEXT: bx lr
%tmp = bitcast i32* %arg to i8*
@@ -1156,9 +1133,10 @@ define i16 @load_i16_from_nonzero_offset(i8* %p) {
;
; CHECK-THUMBv7-LABEL: load_i16_from_nonzero_offset:
; CHECK-THUMBv7: @ %bb.0:
-; CHECK-THUMBv7-NEXT: ldrh r1, [r0]
-; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #2]
-; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #8
+; CHECK-THUMBv7-NEXT: ldrb r1, [r0, #2]
+; CHECK-THUMBv7-NEXT: ldrh r0, [r0]
+; CHECK-THUMBv7-NEXT: lsls r0, r0, #8
+; CHECK-THUMBv7-NEXT: adds r0, r0, r1
; CHECK-THUMBv7-NEXT: bx lr
%p1.i16 = bitcast i8* %p to i16*
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