[PATCH] D70129: [AArch64] [FrameLowering] Allow conditional insertion of CFI instruction

[David Tellenbach via Phabricator via llvm-commits]

tellenbach updated this revision to Diff 230298.
tellenbach added a comment.

Address review comments.

The unrelated test `arm64-blockaddress.ll` had to be changed since one
temporary symbol less is generated due to the patch (if `nounwind` is set). So
`Ltmp1` is now `Ltmp0`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70129/new/

https://reviews.llvm.org/D70129

Files:
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  llvm/test/CodeGen/AArch64/arm64-blockaddress.ll
  llvm/test/CodeGen/AArch64/no_cfi.ll


Index: llvm/test/CodeGen/AArch64/no_cfi.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/no_cfi.ll
@@ -0,0 +1,13 @@
+; RUN: llc -mtriple aarch64-arm-linux-gnu -o - %s | FileCheck %s
+
+; CHECK:        a:                                      // @a
+; CHECK-NEXT:   // %bb.0:
+; CHECK-NEXT:           sub     sp, sp, #16
+; CHECK-NOT:            .cfi{{.*}}
+; CHECK:                ret
+define void @a() nounwind {
+  %1 = alloca i32, align 4
+  store i32 1, i32* %1, align 4
+  ret void
+}
+
Index: llvm/test/CodeGen/AArch64/arm64-blockaddress.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64-blockaddress.ll
+++ llvm/test/CodeGen/AArch64/arm64-blockaddress.ll
@@ -7,12 +7,12 @@
 define i64 @t() nounwind ssp {
 entry:
 ; CHECK-LABEL: t:
-; CHECK: adrp [[REG:x[0-9]+]], Ltmp1 at PAGE
-; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp1 at PAGEOFF
+; CHECK: adrp [[REG:x[0-9]+]], Ltmp0 at PAGE
+; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp0 at PAGEOFF
 
 ; CHECK-LINUX-LABEL: t:
-; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp1
-; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp1
+; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp0
+; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp0
 
 ; CHECK-LARGE-LABEL: t:
 ; CHECK-LARGE: movz [[ADDR_REG:x[0-9]+]], #:abs_g0_nc:[[DEST_LBL:.Ltmp[0-9]+]]
Index: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -935,15 +935,15 @@
       emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP,
                       {-NumBytes, MVT::i8}, TII, MachineInstr::FrameSetup,
                       false, NeedsWinCFI, &HasWinCFI);
-      if (!NeedsWinCFI) {
+      if (!NeedsWinCFI && needsFrameMoves) {
         // Label used to tie together the PROLOG_LABEL and the MachineMoves.
         MCSymbol *FrameLabel = MMI.getContext().createTempSymbol();
-        // Encode the stack size of the leaf function.
-        unsigned CFIIndex = MF.addFrameInst(
-            MCCFIInstruction::createDefCfaOffset(FrameLabel, -NumBytes));
-        BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
-            .addCFIIndex(CFIIndex)
-            .setMIFlags(MachineInstr::FrameSetup);
+          // Encode the stack size of the leaf function.
+          unsigned CFIIndex = MF.addFrameInst(
+              MCCFIInstruction::createDefCfaOffset(FrameLabel, -NumBytes));
+          BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+              .addCFIIndex(CFIIndex)
+              .setMIFlags(MachineInstr::FrameSetup);
       }
     }
 


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