[llvm] cf823ce - [AArch64] Fix MIR test instruction to not have invalid operand.

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2019-11-19T13:40:11-08:00
New Revision: cf823ce4ad9d04c69b7c29d236f7b14c875111c2

URL: https://github.com/llvm/llvm-project/commit/cf823ce4ad9d04c69b7c29d236f7b14c875111c2
DIFF: https://github.com/llvm/llvm-project/commit/cf823ce4ad9d04c69b7c29d236f7b14c875111c2.diff

LOG: [AArch64] Fix MIR test instruction to not have invalid operand.

In anticipation of an improved verifier in D63973.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
index 3956c2960bcf..a02a81c82a01 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
@@ -69,7 +69,7 @@ body:             |
   ; CHECK:   G_BRCOND [[TRUNC1]](s1), %bb.3
   ; CHECK:   G_BR %bb.1
   ; CHECK: bb.3.bb10:
-  ; CHECK:   RET 0
+  ; CHECK:   RET_ReallyLR
   bb.1.bb:
     %3:_(s64) = G_CONSTANT i64 0
     %2:_(p0) = G_INTTOPTR %3(s64)
@@ -94,6 +94,6 @@ body:             |
     G_BR %bb.2
 
   bb.4.bb10:
-    RET 0
+    RET_ReallyLR
 
 ...