[PATCH] D70400: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:6332
 
+bool SIInstrInfo::isAsmOnlyOpcode(int MCOp) const {
+  switch(MCOp) {
----------------
dp wrote:
> vpykhtin wrote:
> > is there anyway to mark these instructions in td files? 
> I thought about it. Yes, it is possible, but that will not make code more readable overall.
> Labelling these opcodes in td will make code cleaner in this file, but require more changes elsewhere.
> 
> Overall I think that this case is very special and requires a special solution. If we face similar issues in the future (that need more cases in the switch below), we may create a flag for this purpose. I'm not sure it is necessary for MOVREL*.
Is it the same as isAsmParserOnly in td? If so shouldn't it be easy to mark it there?
In turn if we need an extra TSFlags bit that is not worth it, as these bits are not countless.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70400/new/

https://reviews.llvm.org/D70400