[PATCH] D70396: [Object][RISCV] Fix R_RISCV_SET6 and R_RISCV_SUB6 relocations resolution

[Luís Marques via Phabricator via llvm-commits]

luismarques created this revision.
luismarques added reviewers: asb, lenary, HsiangKai.
Herald added subscribers: llvm-commits, sameer.abuasal, s.egerton, benna, psnobl, rkruppe, rogfer01, shiva0217, kito-cheng, simoncook, hiraditya.
Herald added a project: LLVM.

These relocations had a suspicious resolution logic, given their name. This patch
makes the resolution match the LLD one, which makes more sense.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D70396

Files:
  llvm/lib/Object/RelocationResolver.cpp


Index: llvm/lib/Object/RelocationResolver.cpp
===================================================================
--- llvm/lib/Object/RelocationResolver.cpp
+++ llvm/lib/Object/RelocationResolver.cpp
@@ -363,9 +363,9 @@
   case ELF::R_RISCV_64:
     return S + RA;
   case ELF::R_RISCV_SET6:
-    return (A + (S + RA)) & 0xFF;
+    return (A & 0xC0) | ((S + RA) & 0x3F);
   case ELF::R_RISCV_SUB6:
-    return (A - (S + RA)) & 0xFF;
+    return (A & 0xC0) | (((A & 0x3F) - (S + RA)) & 0x3F);
   case ELF::R_RISCV_ADD8:
     return (A + (S + RA)) & 0xFF;
   case ELF::R_RISCV_SUB8:


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