[llvm] af43528 - [LegalizeTypes][X86] Add support for expanding the result type of STRICT_LLROUND and STRICT_LLRINT.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 17 20:03:15 PST 2019
Author: Craig Topper
Date: 2019-11-17T20:03:05-08:00
New Revision: af435286e53d769d14d7a7fff6b1e3a075bfefca
URL: https://github.com/llvm/llvm-project/commit/af435286e53d769d14d7a7fff6b1e3a075bfefca
DIFF: https://github.com/llvm/llvm-project/commit/af435286e53d769d14d7a7fff6b1e3a075bfefca.diff
LOG: [LegalizeTypes][X86] Add support for expanding the result type of STRICT_LLROUND and STRICT_LLRINT.
This doesn't handle softening the input type, but we don't handle
softening any of the strict nodes yet. Skipping that made it easy
to reuse an existing function for creating a libcall from a node
with a chain.
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/test/CodeGen/X86/fp-intrinsics.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index d8e04e9b435a..36d66606de17 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1698,6 +1698,8 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
case ISD::FLT_ROUNDS_: ExpandIntRes_FLT_ROUNDS(N, Lo, Hi); break;
case ISD::FP_TO_SINT: ExpandIntRes_FP_TO_SINT(N, Lo, Hi); break;
case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_UINT(N, Lo, Hi); break;
+ case ISD::STRICT_LLROUND:
+ case ISD::STRICT_LLRINT:
case ISD::LLROUND:
case ISD::LLRINT: ExpandIntRes_LLROUND_LLRINT(N, Lo, Hi); break;
case ISD::LOAD: ExpandIntRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); break;
@@ -2586,7 +2588,7 @@ void DAGTypeLegalizer::ExpandIntRes_FP_TO_UINT(SDNode *N, SDValue &Lo,
void DAGTypeLegalizer::ExpandIntRes_LLROUND_LLRINT(SDNode *N, SDValue &Lo,
SDValue &Hi) {
- SDValue Op = N->getOperand(0);
+ SDValue Op = N->getOperand(N->isStrictFPOpcode() ? 1 : 0);
assert(getTypeAction(Op.getValueType()) != TargetLowering::TypePromoteFloat &&
"Input type needs to be promoted!");
@@ -2594,7 +2596,8 @@ void DAGTypeLegalizer::ExpandIntRes_LLROUND_LLRINT(SDNode *N, SDValue &Lo,
EVT VT = Op.getValueType();
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
- if (N->getOpcode() == ISD::LLROUND) {
+ if (N->getOpcode() == ISD::LLROUND ||
+ N->getOpcode() == ISD::STRICT_LLROUND) {
if (VT == MVT::f32)
LC = RTLIB::LLROUND_F32;
else if (VT == MVT::f64)
@@ -2606,7 +2609,8 @@ void DAGTypeLegalizer::ExpandIntRes_LLROUND_LLRINT(SDNode *N, SDValue &Lo,
else if (VT == MVT::ppcf128)
LC = RTLIB::LLROUND_PPCF128;
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected llround input type!");
- } else if (N->getOpcode() == ISD::LLRINT) {
+ } else if (N->getOpcode() == ISD::LLRINT ||
+ N->getOpcode() == ISD::STRICT_LLRINT) {
if (VT == MVT::f32)
LC = RTLIB::LLRINT_F32;
else if (VT == MVT::f64)
@@ -2623,6 +2627,17 @@ void DAGTypeLegalizer::ExpandIntRes_LLROUND_LLRINT(SDNode *N, SDValue &Lo,
SDLoc dl(N);
EVT RetVT = N->getValueType(0);
+
+ if (N->isStrictFPOpcode()) {
+ // FIXME: Support softening for strict fp!
+ assert(getTypeAction(VT) != TargetLowering::TypeSoftenFloat &&
+ "Softening strict fp calls not supported yet!");
+ std::pair<SDValue, SDValue> Tmp = ExpandChainLibCall(LC, N, true);
+ SplitInteger(Tmp.first, Lo, Hi);
+ ReplaceValueWith(SDValue(N, 1), Tmp.second);
+ return;
+ }
+
TargetLowering::MakeLibCallOptions CallOptions;
CallOptions.setSExt(true);
diff --git a/llvm/test/CodeGen/X86/fp-intrinsics.ll b/llvm/test/CodeGen/X86/fp-intrinsics.ll
index 7d5a04dfe518..07655e80665e 100644
--- a/llvm/test/CodeGen/X86/fp-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/fp-intrinsics.ll
@@ -1,4 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O3 -mtriple=i686-pc-linux -mattr=sse2 < %s | FileCheck %s --check-prefix=COMMON --check-prefix=X86-SSE
; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s --check-prefix=COMMON --check-prefix=SSE
; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx < %s | FileCheck %s --check-prefix=COMMON --check-prefix=AVX --check-prefix=AVX1
; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx512f < %s | FileCheck %s --check-prefix=COMMON --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
@@ -13,6 +14,18 @@
; }
;
define double @f1() #0 {
+; X86-SSE-LABEL: f1:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: divsd {{\.LCPI.*}}, %xmm0
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: fldl (%esp)
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f1:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -42,6 +55,19 @@ entry:
; }
;
define double @f2(double %a) #0 {
+; X86-SSE-LABEL: f2:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: xorpd %xmm1, %xmm1
+; X86-SSE-NEXT: subsd %xmm1, %xmm0
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: fldl (%esp)
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f2:
; SSE: # %bb.0: # %entry
; SSE-NEXT: xorpd %xmm1, %xmm1
@@ -72,6 +98,21 @@ entry:
; }
;
define double @f3(double %a, double %b) #0 {
+; X86-SSE-LABEL: f3:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movapd %xmm0, %xmm1
+; X86-SSE-NEXT: subsd {{[0-9]+}}(%esp), %xmm1
+; X86-SSE-NEXT: mulsd {{[0-9]+}}(%esp), %xmm1
+; X86-SSE-NEXT: subsd %xmm1, %xmm0
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: fldl (%esp)
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f3:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
@@ -118,6 +159,22 @@ entry:
;
;
define double @f4(i32 %n, double %a) #0 {
+; X86-SSE-LABEL: f4:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: jle .LBB3_2
+; X86-SSE-NEXT: # %bb.1: # %if.then
+; X86-SSE-NEXT: addsd {{\.LCPI.*}}, %xmm0
+; X86-SSE-NEXT: .LBB3_2: # %if.end
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: fldl (%esp)
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f4:
; SSE: # %bb.0: # %entry
; SSE-NEXT: testl %edi, %edi
@@ -153,6 +210,18 @@ if.end:
; Verify that sqrt(42.0) isn't simplified when the rounding mode is unknown.
define double @f5() #0 {
+; X86-SSE-LABEL: f5:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: sqrtsd %xmm0, %xmm0
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: fldl (%esp)
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f5:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -173,6 +242,19 @@ entry:
; Verify that pow(42.1, 3.0) isn't simplified when the rounding mode is unknown.
define double @f6() #0 {
+; X86-SSE-LABEL: f6:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $28, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 32
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll pow
+; X86-SSE-NEXT: addl $28, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f6:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -194,6 +276,18 @@ entry:
; Verify that powi(42.1, 3) isn't simplified when the rounding mode is unknown.
define double @f7() #0 {
+; X86-SSE-LABEL: f7:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: movl $3, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: calll __powidf2
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f7:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -215,6 +309,17 @@ entry:
; Verify that sin(42.0) isn't simplified when the rounding mode is unknown.
define double @f8() #0 {
+; X86-SSE-LABEL: f8:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll sin
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f8:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -233,6 +338,17 @@ entry:
; Verify that cos(42.0) isn't simplified when the rounding mode is unknown.
define double @f9() #0 {
+; X86-SSE-LABEL: f9:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll cos
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f9:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -251,6 +367,17 @@ entry:
; Verify that exp(42.0) isn't simplified when the rounding mode is unknown.
define double @f10() #0 {
+; X86-SSE-LABEL: f10:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll exp
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f10:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -269,6 +396,17 @@ entry:
; Verify that exp2(42.1) isn't simplified when the rounding mode is unknown.
define double @f11() #0 {
+; X86-SSE-LABEL: f11:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll exp2
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f11:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -287,6 +425,17 @@ entry:
; Verify that log(42.0) isn't simplified when the rounding mode is unknown.
define double @f12() #0 {
+; X86-SSE-LABEL: f12:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll log
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f12:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -305,6 +454,17 @@ entry:
; Verify that log10(42.0) isn't simplified when the rounding mode is unknown.
define double @f13() #0 {
+; X86-SSE-LABEL: f13:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll log10
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f13:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -323,6 +483,17 @@ entry:
; Verify that log2(42.0) isn't simplified when the rounding mode is unknown.
define double @f14() #0 {
+; X86-SSE-LABEL: f14:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll log2
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f14:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -341,6 +512,17 @@ entry:
; Verify that rint(42.1) isn't simplified when the rounding mode is unknown.
define double @f15() #0 {
+; X86-SSE-LABEL: f15:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll rint
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f15:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -361,6 +543,17 @@ entry:
; Verify that nearbyint(42.1) isn't simplified when the rounding mode is
; unknown.
define double @f16() #0 {
+; X86-SSE-LABEL: f16:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll nearbyint
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f16:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -380,6 +573,19 @@ entry:
}
define double @f19() #0 {
+; X86-SSE-LABEL: f19:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $28, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 32
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll fmod
+; X86-SSE-NEXT: addl $28, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f19:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -404,6 +610,11 @@ entry:
; unknown. The expansion should have only one conversion instruction.
; Verify that no gross errors happen.
define i32 @f20s(double %x) #0 {
+; X86-SSE-LABEL: f20s:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f20s:
; SSE: # %bb.0: # %entry
; SSE-NEXT: cvttsd2si %xmm0, %eax
@@ -423,6 +634,25 @@ entry:
; unknown. The expansion should have only one conversion instruction.
; Verify that no gross errors happen.
define i32 @f20u(double %x) #0 {
+; X86-SSE-LABEL: f20u:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-SSE-NEXT: movapd %xmm0, %xmm2
+; X86-SSE-NEXT: cmpltsd %xmm1, %xmm2
+; X86-SSE-NEXT: movapd %xmm2, %xmm3
+; X86-SSE-NEXT: andpd %xmm0, %xmm2
+; X86-SSE-NEXT: xorl %eax, %eax
+; X86-SSE-NEXT: ucomisd %xmm0, %xmm1
+; X86-SSE-NEXT: subsd %xmm1, %xmm0
+; X86-SSE-NEXT: andnpd %xmm0, %xmm3
+; X86-SSE-NEXT: orpd %xmm3, %xmm2
+; X86-SSE-NEXT: cvttsd2si %xmm2, %ecx
+; X86-SSE-NEXT: setbe %al
+; X86-SSE-NEXT: shll $31, %eax
+; X86-SSE-NEXT: xorl %ecx, %eax
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f20u:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
@@ -478,6 +708,18 @@ entry:
; unknown.
; Verify that no gross errors happen.
define float @f21() #0 {
+; X86-SSE-LABEL: f21:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: pushl %eax
+; X86-SSE-NEXT: .cfi_def_cfa_offset 8
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: cvtsd2ss %xmm0, %xmm0
+; X86-SSE-NEXT: movss %xmm0, (%esp)
+; X86-SSE-NEXT: flds (%esp)
+; X86-SSE-NEXT: popl %eax
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f21:
; SSE: # %bb.0: # %entry
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -498,6 +740,18 @@ entry:
}
define double @f22(float %x) #0 {
+; X86-SSE-LABEL: f22:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-SSE-NEXT: cvtss2sd %xmm0, %xmm0
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: fldl (%esp)
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
; SSE-LABEL: f22:
; SSE: # %bb.0: # %entry
; SSE-NEXT: cvtss2sd %xmm0, %xmm0
@@ -536,9 +790,24 @@ entry:
}
define i64 @f25(double %x) #0 {
-; COMMON-LABEL: f25:
-; COMMON: # %bb.0: # %entry
-; COMMON-NEXT: jmp llrint # TAILCALL
+; X86-SSE-LABEL: f25:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll llrint
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
+; SSE-LABEL: f25:
+; SSE: # %bb.0: # %entry
+; SSE-NEXT: jmp llrint # TAILCALL
+;
+; AVX-LABEL: f25:
+; AVX: # %bb.0: # %entry
+; AVX-NEXT: jmp llrint # TAILCALL
entry:
%result = call i64 @llvm.experimental.constrained.llrint.i64.f64(double %x,
metadata !"round.dynamic",
@@ -547,9 +816,24 @@ entry:
}
define i64 @f26(float %x) {
-; COMMON-LABEL: f26:
-; COMMON: # %bb.0: # %entry
-; COMMON-NEXT: jmp llrintf # TAILCALL
+; X86-SSE-LABEL: f26:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-SSE-NEXT: movss %xmm0, (%esp)
+; X86-SSE-NEXT: calll llrintf
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
+; SSE-LABEL: f26:
+; SSE: # %bb.0: # %entry
+; SSE-NEXT: jmp llrintf # TAILCALL
+;
+; AVX-LABEL: f26:
+; AVX: # %bb.0: # %entry
+; AVX-NEXT: jmp llrintf # TAILCALL
entry:
%result = call i64 @llvm.experimental.constrained.llrint.i64.f32(float %x,
metadata !"round.dynamic",
@@ -578,9 +862,24 @@ entry:
}
define i64 @f29(double %x) #0 {
-; COMMON-LABEL: f29:
-; COMMON: # %bb.0: # %entry
-; COMMON-NEXT: jmp llround # TAILCALL
+; X86-SSE-LABEL: f29:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE-NEXT: movsd %xmm0, (%esp)
+; X86-SSE-NEXT: calll llround
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
+; SSE-LABEL: f29:
+; SSE: # %bb.0: # %entry
+; SSE-NEXT: jmp llround # TAILCALL
+;
+; AVX-LABEL: f29:
+; AVX: # %bb.0: # %entry
+; AVX-NEXT: jmp llround # TAILCALL
entry:
%result = call i64 @llvm.experimental.constrained.llround.i64.f64(double %x,
metadata !"fpexcept.strict") #0
@@ -588,9 +887,24 @@ entry:
}
define i64 @f30(float %x) #0 {
-; COMMON-LABEL: f30:
-; COMMON: # %bb.0: # %entry
-; COMMON-NEXT: jmp llroundf # TAILCALL
+; X86-SSE-LABEL: f30:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: subl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 16
+; X86-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-SSE-NEXT: movss %xmm0, (%esp)
+; X86-SSE-NEXT: calll llroundf
+; X86-SSE-NEXT: addl $12, %esp
+; X86-SSE-NEXT: .cfi_def_cfa_offset 4
+; X86-SSE-NEXT: retl
+;
+; SSE-LABEL: f30:
+; SSE: # %bb.0: # %entry
+; SSE-NEXT: jmp llroundf # TAILCALL
+;
+; AVX-LABEL: f30:
+; AVX: # %bb.0: # %entry
+; AVX-NEXT: jmp llroundf # TAILCALL
entry:
%result = call i64 @llvm.experimental.constrained.llround.i64.f32(float %x,
metadata !"fpexcept.strict") #0
More information about the llvm-commits
mailing list