[PATCH] D70118: [AMDGPU] Lower llvm.amdgcn.s.buffer.load.v3[i|f]32
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 15 04:47:26 PST 2019
arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.
LGMT
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:5683
+ ISD::EXTRACT_SUBVECTOR, DL, VT, WidenedOp,
+ DAG.getConstant(0, DL, getVectorIdxTy(DAG.getDataLayout())));
+ return Subvector;
----------------
Hardcoding the index type to i32 is fine in target specific code
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70118/new/
https://reviews.llvm.org/D70118
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