[PATCH] D70124: [RISCV] Use addi rather than add x0
Sam Elliott via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 14 10:52:44 PST 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rG32d840d29179: [RISCV] Use addi rather than add x0 (authored by lenary).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70124/new/
https://reviews.llvm.org/D70124
Files:
llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
llvm/test/CodeGen/RISCV/atomic-rmw.ll
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