[PATCH] D70286: Merge memtag instructions with adjacent stack slots.

[Evgenii Stepanov via Phabricator via llvm-commits]

eugenis created this revision.
eugenis added reviewers: pcc, ostannard.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

Detect a run of memory tagging instructions for adjacent stack frame slots,
and replace them with a shorter instruction sequence

- replace STG + STG with ST2G
- replace STGloop + STGloop with STGloop

This code needs to run when stack slot offsets are already known, but before
FrameIndex operands in STG instructions are eliminated; that's the
reason for the new hook in PrologueEpilogue.

This change modifies STGloop and STZGloop pseudos to take the size as an
immediate integer operand, and base address as a FI operand when
possible. This is needed to simplify recognizing an STGloop instruction
as operating on a stack slot post-regalloc.

This improves memtag code size by ~0.25%, and it looks like an additional ~0.1%
is possible by rearranging the stack frame such that consecutive STG
instructions reference adjacent slots (patch pending).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D70286

Files:
  llvm/include/llvm/CodeGen/TargetFrameLowering.h
  llvm/lib/CodeGen/PrologEpilogInserter.cpp
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  llvm/lib/Target/AArch64/AArch64FrameLowering.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
  llvm/lib/Target/AArch64/AArch64RegisterInfo.h
  llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
  llvm/test/CodeGen/AArch64/settag-merge.ll
  llvm/test/CodeGen/AArch64/settag.ll

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