[llvm] bcb6829 - [NFC] Add one test for PowerPC to verify the sext_inreg for vector type.

[QingShan Zhang via llvm-commits]

Author: QingShan Zhang
Date: 2019-11-14T10:57:05Z
New Revision: bcb6829ee625845d841a0f949c60cc2699473cbd

URL: https://github.com/llvm/llvm-project/commit/bcb6829ee625845d841a0f949c60cc2699473cbd
DIFF: https://github.com/llvm/llvm-project/commit/bcb6829ee625845d841a0f949c60cc2699473cbd.diff

LOG: [NFC] Add one test for PowerPC to verify the sext_inreg for vector type.

Added: 
    llvm/test/CodeGen/PowerPC/sext-vector-inreg.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/sext-vector-inreg.ll b/llvm/test/CodeGen/PowerPC/sext-vector-inreg.ll
new file mode 100644
index 000000000000..8dce954d9d18
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/sext-vector-inreg.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck -check-prefix=CHECK-P9 %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck -check-prefix=CHECK-P8 %s
+define <4 x i32> @test_signext_vector_inreg(<4 x i16> %n) {
+; CHECK-P9-LABEL: test_signext_vector_inreg:
+; CHECK-P9:       # %bb.0: # %entry
+; CHECK-P9-NEXT:    vspltisw 3, 8
+; CHECK-P9-NEXT:    vmrglh 2, 2, 2
+; CHECK-P9-NEXT:    vadduwm 3, 3, 3
+; CHECK-P9-NEXT:    vslw 2, 2, 3
+; CHECK-P9-NEXT:    vsraw 2, 2, 3
+; CHECK-P9-NEXT:    blr
+;
+; CHECK-P8-LABEL: test_signext_vector_inreg:
+; CHECK-P8:       # %bb.0: # %entry
+; CHECK-P8-NEXT:    vmrglh 2, 2, 2
+; CHECK-P8-NEXT:    vspltisw 3, 8
+; CHECK-P8-NEXT:    vadduwm 3, 3, 3
+; CHECK-P8-NEXT:    vslw 2, 2, 3
+; CHECK-P8-NEXT:    vsraw 2, 2, 3
+; CHECK-P8-NEXT:    blr
+entry:
+  %0 = sext <4 x i16> %n to <4 x i32>
+  ret <4 x i32> %0
+}