[PATCH] D70210: [MirNamer][Canonicalizer]: Perform instruction semantic based renaming

[Puyan Lotfi via Phabricator via llvm-commits]

plotfi added inline comments.


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Comment at: llvm/lib/CodeGen/MIRVRegNamerUtils.cpp:81
+      return Register::isVirtualRegister(MO.getReg())
+                 ? MRI.getVRegDef(MO.getReg())->getOpcode()
+                 : (unsigned)MO.getReg();
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plotfi wrote:
> I think the candidate walk code can be left alone here, and removed in an NFC if really necessary.
How do you guarantee that two different vregs don't resolve to the same "HashOperand" value? Because can't the opcode of two different def instructions happen to be the same?  Is it just highly unlikely because you are also hashing the operands of the entire instruction together? 


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70210/new/

https://reviews.llvm.org/D70210