[llvm] 643ac6c - [AArch64][v8.3a] Add LDRA '[xN]!' alias.

[Ahmed Bougacha via llvm-commits]

Author: Ahmed Bougacha
Date: 2019-11-13T10:38:11-08:00
New Revision: 643ac6c0420b70571ef0fc0f65ab66e736eea225

URL: https://github.com/llvm/llvm-project/commit/643ac6c0420b70571ef0fc0f65ab66e736eea225
DIFF: https://github.com/llvm/llvm-project/commit/643ac6c0420b70571ef0fc0f65ab66e736eea225.diff

LOG: [AArch64][v8.3a] Add LDRA '[xN]!' alias.

The instruction definition has been retroactively expanded to
allow for an alias for '[xN, 0]!' as '[xN]!'.
That wouldn't make sense on LDR, but does for LDRA.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64InstrFormats.td
    llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
    llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
index 10b5a21a9222..7317b15990d9 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1463,6 +1463,9 @@ multiclass AuthLoad<bit M, string asm, Operand opr> {
 
   def : InstAlias<asm # "\t$Rt, [$Rn]",
                   (!cast<Instruction>(NAME # "indexed") GPR64:$Rt, GPR64sp:$Rn, 0)>;
+
+  def : InstAlias<asm # "\t$Rt, [$wback]!",
+                  (!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0)>;
 }
 
 //---

diff  --git a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
index fe34002680e3..2ca15fceccc8 100644
--- a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
+++ b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
@@ -306,3 +306,11 @@
 // CHECK-NEXT: ldrab x0, [x1]  // encoding: [0x20,0x04,0xa0,0xf8]
 // CHECK-REQ: error: instruction requires: pa
 // CHECK-REQ-NEXT:  ldrab x0, [x1]
+  ldraa x0, [x1]!
+// CHECK-NEXT: ldraa x0, [x1]!  // encoding: [0x20,0x0c,0x20,0xf8]
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT:  ldraa x0, [x1]!
+  ldrab x0, [x1]!
+// CHECK-NEXT: ldrab x0, [x1]!  // encoding: [0x20,0x0c,0xa0,0xf8]
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT:  ldrab x0, [x1]!

diff  --git a/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt b/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
index 18b376631c4b..d11056044fa4 100644
--- a/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
+++ b/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
@@ -83,14 +83,6 @@
 # CHECK: retab
 # CHECK: eretaa
 # CHECK: eretab
-# CHECK: ldraa x0, [x1, #4088]
-# CHECK: ldraa x0, [x1, #-4096]
-# CHECK: ldrab x0, [x1, #4088]
-# CHECK: ldrab x0, [x1, #-4096]
-# CHECK: ldraa x0, [x1, #4088]!
-# CHECK: ldraa x0, [x1, #-4096]!
-# CHECK: ldrab x0, [x1, #4088]!
-# CHECK: ldrab x0, [x1, #-4096]!
 [0x1f,0x08,0x1f,0xd6]
 [0x1f,0x0c,0x1f,0xd6]
 [0x1f,0x08,0x3f,0xd6]
@@ -99,6 +91,15 @@
 [0xff,0x0f,0x5f,0xd6]
 [0xff,0x0b,0x9f,0xd6]
 [0xff,0x0f,0x9f,0xd6]
+
+# CHECK: ldraa x0, [x1, #4088]
+# CHECK: ldraa x0, [x1, #-4096]
+# CHECK: ldrab x0, [x1, #4088]
+# CHECK: ldrab x0, [x1, #-4096]
+# CHECK: ldraa x0, [x1, #4088]!
+# CHECK: ldraa x0, [x1, #-4096]!
+# CHECK: ldrab x0, [x1, #4088]!
+# CHECK: ldrab x0, [x1, #-4096]!
 [0x20,0xf4,0x3f,0xf8]
 [0x20,0x04,0x60,0xf8]
 [0x20,0xf4,0xbf,0xf8]
@@ -112,3 +113,8 @@
 # CHECK: ldrab x0, [x1]
 [0x20,0x04,0x20,0xf8]
 [0x20,0x04,0xa0,0xf8]
+
+# CHECK: ldraa x0, [x1]!
+# CHECK: ldrab x0, [x1]!
+[0x20,0x0c,0x20,0xf8]
+[0x20,0x0c,0xa0,0xf8]