[PATCH] D70187: Add accessors for MCSubtargetInfo CPU and Feature tables

[Marc-Antoine Perennou via Phabricator via llvm-commits]

Keruspe updated this revision to Diff 229109.
Keruspe added a comment.

Fixed repository in diff


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70187/new/

https://reviews.llvm.org/D70187

Files:
  llvm/include/llvm/MC/MCSubtargetInfo.h


Index: llvm/include/llvm/MC/MCSubtargetInfo.h
===================================================================
--- llvm/include/llvm/MC/MCSubtargetInfo.h
+++ llvm/include/llvm/MC/MCSubtargetInfo.h
@@ -267,6 +267,14 @@
   /// prefetching.
   ///
   virtual unsigned getMinPrefetchStride() const;
+
+  ArrayRef<SubtargetSubTypeKV> getCPUTable() const {
+    return ProcDesc;
+  }
+
+  ArrayRef<SubtargetFeatureKV> getFeatureTable() const {
+    return ProcFeatures;
+  }
 };
 
 } // end namespace llvm


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D70187.229109.patch
Type: text/x-patch
Size: 503 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191113/8d3bfbe4/attachment.bin>