[PATCH] D70000: [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG for vector type as 'expand' instead of 'legal'

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/test/CodeGen/ARM/signext-inreg.ll:2
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=armv8 -mattr=+mve | FileCheck %s
 define <4 x i32> @test(<4 x i32> %m) {
----------------
steven.zhang wrote:
> steven.zhang wrote:
> > dmgreen wrote:
> > > steven.zhang wrote:
> > > > dmgreen wrote:
> > > > > There are already tests in Thumb2/mve-sext.ll which cover sexts. The target here is a little odd for mve (mixing A profile and M profile architectures).
> > > > I am not familiar with Arm target... From the implementation, it is valid case to show the issue. I will take a look at the case you mentioned. Thank you!
> > > The ARM backend has two completely separate vector architectures in it. There is Neon, the older of the two that works with Cortex-A style cpus (think the big-little cores that are in you phone). Recently we have also added the MVE vector extension that works with Cortex-M style cpus, which are smaller microcontrollers designed to go anywhere (like sensors and other low-power devices). Cortex-A can be A32 (arm) or T32 (thumb), Cortex-M can only be T32 (thumb)
> > > 
> > > So this test has a Cortex-A device (running in A32 mode) with MVE (an T32 extension to M-class cpus).
> > > 
> > > I'm not sure this test is adding a huge amount for MVE, but if you want to keep it I would suggest that part should be moved to with the other MVE tests. Like I said though, they will already be tested by the mve-sext.ll tests. Leaving Neon here sounds good.
> > Thank you for the explanation, dmgree:) I will take a deep look on this.
> So, we have ARM and Thumb2 and MVE is for Thumb2. Is it right ? I will add the test into mve-sext.ll. The testing here is trying to verify that, the Neon won't override the action operation setting for MVE.
Having Neon + MVE at the same time would be an invalid combination.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70000/new/

https://reviews.llvm.org/D70000