[PATCH] D69559: [AArch64] Improve codegen of volatile load/store of i128

[Victor Campos via Phabricator via llvm-commits]

vhscampos updated this revision to Diff 229053.
vhscampos added a comment.

1. Create new AArch64ISD nodes specific to load/store of pairs of registers.
2. Custom lower i128 volatile loads/stores to these new AArch64ISD nodes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69559/new/

https://reviews.llvm.org/D69559

Files:
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/cmpxchg-O0.ll
  llvm/test/CodeGen/AArch64/i128_volatile_load_store.ll

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