[PATCH] D70093: [InstCombine] Avoid moving ops that do restrict undef across shuffles.

[Florian Hahn via Phabricator via llvm-commits]

fhahn marked an inline comment as done.
fhahn added inline comments.


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Comment at: llvm/test/Transforms/InstCombine/vec_shuffle.ll:1010-1016
-; CHECK-NEXT:    [[AND:%.*]] = shufflevector <4 x i16> [[ADD:%.*]], <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
+; CHECK-NEXT:    [[SHUFFLE:%.*]] = shufflevector <4 x i16> [[ADD:%.*]], <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
+; CHECK-NEXT:    [[AND:%.*]] = and <4 x i16> [[SHUFFLE]], <i16 0, i16 0, i16 -1, i16 -1>
 ; CHECK-NEXT:    ret <4 x i16> [[AND]]
 ;
 entry:
   %shuffle = shufflevector <4 x i16> %add, <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
   %and = and <4 x i16> %shuffle, <i16 0, i16 0, i16 -1, i16 -1>
   ret <4 x i16> %and
----------------
spatel wrote:
> lebedev.ri wrote:
> > Hmm yes, i'd agree this is a miscompile..
> This test is not committed to trunk? Add that along with similar patterns for other binop opcodes like the add/sub/shl noted in this patch? That way we'll know if this or my alternate suggestion is behaving as intended.
I did not commit the test yet, but the diff here just shows the difference in output. I'll check with more positive and negative scenarios


Repository:
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  https://reviews.llvm.org/D70093/new/

https://reviews.llvm.org/D70093