[PATCH] D70017: [mips][test] Add Mips CPU tests
Simon Atanasyan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 8 22:34:35 PST 2019
atanasyan added a comment.
- I suggest to join both test cases into the single one
- Let's check more then empty `stderr` in case of success. For example, we can generate an object file, run `llvm-readelf -A` and check `ISA:` and `ISA Extension:` lines. Something like this:
; RUN: llc -mtriple=mips64 -mcpu=mips64r3 -filetype=obj < %s | llvm-readelf -A | FileCheck %s --check-prefix=MIPS64R3
; MIPS64R3: ISA: MIPS64r3
; RUN: llc -mtriple=mips64 -mcpu=octeon -filetype=obj < %s | llvm-readelf -A | FileCheck %s --check-prefix=OCTEON
; OCTEON: ISA: MIPS64r2
; OCTEON: ISA Extension: Cavium Networks Octeon
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70017/new/
https://reviews.llvm.org/D70017
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