[PATCH] D70007: [Intrinsic] Add fixed point division intrinsics.

[Bevin Hansson via Phabricator via llvm-commits]

ebevhan marked an inline comment as done.
ebevhan added a comment.

I will preface this by saying that I'm not terribly pleased with this solution. There is no (easy) way to construct a wide division during operation legalization if the wider type is not legal, so we have to do a whole bunch of work upfront to avoid having to expand. It feels really hacky, but I'm not sure there's any other way of doing it given ISelDAG's design.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7143-7145
+    // For signed operations, if the resulting quotient is negative and the
+    // remainder is nonzero, subtract 1 from the quotient to round towards
+    // negative infinity.
----------------
I'm unsure if this is acceptable. I wanted to align the default expansions of division, multiplication, and shifts, but correcting for rounding requires extra code since regular signed division rounds toward zero.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70007/new/

https://reviews.llvm.org/D70007