[PATCH] D69949: [PowerPC] Legalize rounding nodes

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, PowerPC.
Herald added subscribers: shchenz, jsji, kbarton, hiraditya.
Herald added a project: LLVM.

VSX provides a full complement of rounding instructions yet we somehow ended up with some of them legal and others not. This just legalizes all of the FP rounding nodes and the FP -> int rounding nodes with unsafe math.


Repository:
  rL LLVM

https://reviews.llvm.org/D69949

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
  llvm/test/CodeGen/PowerPC/rounding-ops.ll
  llvm/test/CodeGen/PowerPC/scalar-rounding-ops.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

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