[PATCH] D69919: [AMDGPU] Add handling of 160 bit registers in analyzeResourceUsage

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec created this revision.
rampitec added reviewers: kzhuravl, arsenm.
Herald added subscribers: dkrupp, donat.nagy, Szelethus, a.sidorin, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely.
Herald added a project: LLVM.

This was omitted. Also SReg_96Reg missed IsSGPR assignment.


https://reviews.llvm.org/D69919

Files:
  llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp


Index: llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -793,6 +793,7 @@
           IsSGPR = false;
           Width = 3;
         } else if (AMDGPU::SReg_96RegClass.contains(Reg)) {
+          IsSGPR = true;
           Width = 3;
         } else if (AMDGPU::SReg_128RegClass.contains(Reg)) {
           assert(!AMDGPU::TTMP_128RegClass.contains(Reg) &&
@@ -806,6 +807,12 @@
           IsSGPR = false;
           IsAGPR = true;
           Width = 4;
+        } else if (AMDGPU::VReg_160RegClass.contains(Reg)) {
+          IsSGPR = false;
+          Width = 5;
+        } else if (AMDGPU::SReg_160RegClass.contains(Reg)) {
+          IsSGPR = true;
+          Width = 5;
         } else if (AMDGPU::SReg_256RegClass.contains(Reg)) {
           assert(!AMDGPU::TTMP_256RegClass.contains(Reg) &&
             "trap handler registers should not be used");


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