[PATCH] D69850: [mips] Support `octeon+` CPU in the `.set arch=` directive
Simon Atanasyan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 7 03:04:19 PST 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3718102d40d6: [mips] Support `octeon+` CPU in the `.set arch=` directive (authored by atanasyan).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69850/new/
https://reviews.llvm.org/D69850
Files:
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/test/MC/Mips/set-arch.s
Index: llvm/test/MC/Mips/set-arch.s
===================================================================
--- llvm/test/MC/Mips/set-arch.s
+++ llvm/test/MC/Mips/set-arch.s
@@ -38,6 +38,8 @@
mod $2, $4, $6
.set arch=octeon
baddu $9, $6, $7
+ .set arch=octeon+
+ saa $2, ($5)
.set arch=r4000
dadd $2, $2, $2
@@ -65,5 +67,7 @@
# CHECK: mod $2, $4, $6
# CHECK: .set arch=octeon
# CHECK: baddu $9, $6, $7
+# CHECK: .set arch=octeon+
+# CHECK: saa $2, ($5)
# CHECK: .set arch=r4000
# CHECK: dadd $2, $2, $2
Index: llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
===================================================================
--- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -7175,8 +7175,8 @@
return reportParseError("unexpected token, expected equals sign");
Parser.Lex();
- StringRef Arch;
- if (Parser.parseIdentifier(Arch))
+ StringRef Arch = getParser().parseStringToEndOfStatement().trim();
+ if (Arch.empty())
return reportParseError("expected arch identifier");
StringRef ArchFeatureName =
@@ -7197,6 +7197,7 @@
.Case("mips64r5", "mips64r5")
.Case("mips64r6", "mips64r6")
.Case("octeon", "cnmips")
+ .Case("octeon+", "cnmipsp")
.Case("r4000", "mips3") // This is an implementation of Mips3.
.Default("");
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