[llvm] 55b4451 - [NFC][CVP] Add some tests for `sub` with preexisting no-wrap flags
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 7 03:01:22 PST 2019
Author: Roman Lebedev
Date: 2019-11-07T13:59:51+03:00
New Revision: 55b445150da9101fda07a4c28ee6a4e4bc9fc89a
URL: https://github.com/llvm/llvm-project/commit/55b445150da9101fda07a4c28ee6a4e4bc9fc89a
DIFF: https://github.com/llvm/llvm-project/commit/55b445150da9101fda07a4c28ee6a4e4bc9fc89a.diff
LOG: [NFC][CVP] Add some tests for `sub` with preexisting no-wrap flags
We can use those to further limit the ranges in LVI.
Added:
Modified:
llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll b/llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
index 67b74de35c9d..6ec996ff9416 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
@@ -407,4 +407,220 @@ define i1 @test13(i8 %x, i64* %p) {
ret i1 %cmp
}
+define i1 @test14(i32 %a, i32 %b) {
+; CHECK-LABEL: @test14(
+; CHECK-NEXT: begin:
+; CHECK-NEXT: [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
+; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[CONT:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[SUB]], 0
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
+; CHECK-NEXT: ret i1 [[IV]]
+;
+begin:
+ %cmp0 = icmp sge i32 %a, 0
+ %cmp1 = icmp sge i32 %b, 0
+ %br = and i1 %cmp0, %cmp1
+ br i1 %br, label %bb, label %exit
+
+bb:
+ %sub = sub i32 %a, %b
+ br label %cont
+
+cont:
+ %res = icmp sge i32 %sub, 0
+ br label %exit
+
+exit:
+ %iv = phi i1 [ true, %begin ], [ %res, %cont ]
+ ret i1 %iv
+}
+
+define i1 @test15(i32 %a, i32 %b) {
+; CHECK-LABEL: @test15(
+; CHECK-NEXT: begin:
+; CHECK-NEXT: [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
+; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[CONT:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[SUB]], 0
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
+; CHECK-NEXT: ret i1 [[IV]]
+;
+begin:
+ %cmp0 = icmp sge i32 %a, 0
+ %cmp1 = icmp sge i32 %b, 0
+ %br = and i1 %cmp0, %cmp1
+ br i1 %br, label %bb, label %exit
+
+bb:
+ %sub = sub nsw i32 %a, %b
+ br label %cont
+
+cont:
+ %res = icmp sge i32 %sub, 0
+ br label %exit
+
+exit:
+ %iv = phi i1 [ true, %begin ], [ %res, %cont ]
+ ret i1 %iv
+}
+
+define i1 @test16(i32 %a, i32 %b) {
+; CHECK-LABEL: @test16(
+; CHECK-NEXT: begin:
+; CHECK-NEXT: [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
+; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[CONT:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[SUB]], 0
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
+; CHECK-NEXT: ret i1 [[IV]]
+;
+begin:
+ %cmp0 = icmp sge i32 %a, 0
+ %cmp1 = icmp sge i32 %b, 0
+ %br = and i1 %cmp0, %cmp1
+ br i1 %br, label %bb, label %exit
+
+bb:
+ %sub = sub nuw i32 %a, %b
+ br label %cont
+
+cont:
+ %res = icmp sge i32 %sub, 0
+ br label %exit
+
+exit:
+ %iv = phi i1 [ true, %begin ], [ %res, %cont ]
+ ret i1 %iv
+}
+
+define i1 @test17(i32 %a, i32 %b) {
+; CHECK-LABEL: @test17(
+; CHECK-NEXT: begin:
+; CHECK-NEXT: [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
+; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[CONT:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: [[RES:%.*]] = icmp sle i32 [[SUB]], 0
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
+; CHECK-NEXT: ret i1 [[IV]]
+;
+begin:
+ %cmp0 = icmp sle i32 %a, 0
+ %cmp1 = icmp sge i32 %b, 0
+ %br = and i1 %cmp0, %cmp1
+ br i1 %br, label %bb, label %exit
+
+bb:
+ %sub = sub i32 %a, %b
+ br label %cont
+
+cont:
+ %res = icmp sle i32 %sub, 0
+ br label %exit
+
+exit:
+ %iv = phi i1 [ true, %begin ], [ %res, %cont ]
+ ret i1 %iv
+}
+
+define i1 @test18(i32 %a, i32 %b) {
+; CHECK-LABEL: @test18(
+; CHECK-NEXT: begin:
+; CHECK-NEXT: [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
+; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[SUB:%.*]] = sub nuw i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[CONT:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: [[RES:%.*]] = icmp sle i32 [[SUB]], 0
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
+; CHECK-NEXT: ret i1 [[IV]]
+;
+begin:
+ %cmp0 = icmp sle i32 %a, 0
+ %cmp1 = icmp sge i32 %b, 0
+ %br = and i1 %cmp0, %cmp1
+ br i1 %br, label %bb, label %exit
+
+bb:
+ %sub = sub nuw i32 %a, %b
+ br label %cont
+
+cont:
+ %res = icmp sle i32 %sub, 0
+ br label %exit
+
+exit:
+ %iv = phi i1 [ true, %begin ], [ %res, %cont ]
+ ret i1 %iv
+}
+
+define i1 @test19(i32 %a, i32 %b) {
+; CHECK-LABEL: @test19(
+; CHECK-NEXT: begin:
+; CHECK-NEXT: [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
+; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[CONT:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: [[RES:%.*]] = icmp sle i32 [[SUB]], 0
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
+; CHECK-NEXT: ret i1 [[IV]]
+;
+begin:
+ %cmp0 = icmp sle i32 %a, 0
+ %cmp1 = icmp sge i32 %b, 0
+ %br = and i1 %cmp0, %cmp1
+ br i1 %br, label %bb, label %exit
+
+bb:
+ %sub = sub nsw i32 %a, %b
+ br label %cont
+
+cont:
+ %res = icmp sle i32 %sub, 0
+ br label %exit
+
+exit:
+ %iv = phi i1 [ true, %begin ], [ %res, %cont ]
+ ret i1 %iv
+}
+
attributes #4 = { noreturn }
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