[PATCH] D69912: [ModuloSchedule] Do target loop analysis before peeling.
Thomas Raoux via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 6 10:36:44 PST 2019
ThomasRaoux created this revision.
ThomasRaoux added a reviewer: jmolloy.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
Simple change to call target hook analyzeLoopForPipelining before
changing the loop. After peeling analyzing the loop may be more
complicated for target that don't have a loop instruction. This doesn't
affect Hexagone and PPC as they have hardware loop instructions.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D69912
Files:
llvm/include/llvm/CodeGen/ModuloSchedule.h
llvm/lib/CodeGen/ModuloSchedule.cpp
Index: llvm/lib/CodeGen/ModuloSchedule.cpp
===================================================================
--- llvm/lib/CodeGen/ModuloSchedule.cpp
+++ llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -1759,10 +1759,6 @@
}
void PeelingModuloScheduleExpander::fixupBranches() {
- std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> Info =
- TII->analyzeLoopForPipelining(BB);
- assert(Info);
-
// Work outwards from the kernel.
bool KernelDisposed = false;
int TC = Schedule.getNumStages() - 1;
@@ -1818,6 +1814,8 @@
BB = Schedule.getLoop()->getTopBlock();
Preheader = Schedule.getLoop()->getLoopPreheader();
LLVM_DEBUG(Schedule.dump());
+ Info = TII->analyzeLoopForPipelining(BB);
+ assert(Info);
rewriteKernel();
peelPrologAndEpilogs();
Index: llvm/include/llvm/CodeGen/ModuloSchedule.h
===================================================================
--- llvm/include/llvm/CodeGen/ModuloSchedule.h
+++ llvm/include/llvm/CodeGen/ModuloSchedule.h
@@ -342,6 +342,8 @@
MI = CanonicalMIs[MI];
return Schedule.getStage(MI);
}
+ /// Target loop info before kernel peeling.
+ std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> Info = nullptr;
};
/// Expander that simply annotates each scheduled instruction with a post-instr
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