[llvm] 8e34dd9 - [x86] avoid crashing when splitting AVX stores with non-simple type (PR43916)
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 6 06:30:14 PST 2019
Author: Sanjay Patel
Date: 2019-11-06T09:28:41-05:00
New Revision: 8e34dd941cb304c785ef623633ad663b59cfced0
URL: https://github.com/llvm/llvm-project/commit/8e34dd941cb304c785ef623633ad663b59cfced0
DIFF: https://github.com/llvm/llvm-project/commit/8e34dd941cb304c785ef623633ad663b59cfced0.diff
LOG: [x86] avoid crashing when splitting AVX stores with non-simple type (PR43916)
The store splitting transform was assuming a simple type (MVT),
but that's not necessarily the case as shown in the test.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/avx-load-store.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index d1ed862db55e..c4ee6a193a04 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -21776,12 +21776,14 @@ static SDValue splitVectorStore(StoreSDNode *Store, SelectionDAG &DAG) {
"Expecting 256/512-bit op");
// Splitting volatile memory ops is not allowed unless the operation was not
- // legal to begin with. We are assuming the input op is legal (this transform
- // is only used for targets with AVX).
+ // legal to begin with. Assume the input store is legal (this transform is
+ // only used for targets with AVX). Note: It is possible that we have an
+ // illegal type like v2i128, and so we could allow splitting a volatile store
+ // in that case if that is important.
if (!Store->isSimple())
return SDValue();
- MVT StoreVT = StoredVal.getSimpleValueType();
+ EVT StoreVT = StoredVal.getValueType();
unsigned NumElems = StoreVT.getVectorNumElements();
unsigned HalfSize = StoredVal.getValueSizeInBits() / 2;
unsigned HalfAlign = (128 == HalfSize ? 16 : 32);
diff --git a/llvm/test/CodeGen/X86/avx-load-store.ll b/llvm/test/CodeGen/X86/avx-load-store.ll
index 402e2705191e..1b3c35855ae9 100644
--- a/llvm/test/CodeGen/X86/avx-load-store.ll
+++ b/llvm/test/CodeGen/X86/avx-load-store.ll
@@ -333,3 +333,26 @@ define void @add4i64a16(<4 x i64>* %ret, <4 x i64>* %bp) nounwind {
ret void
}
+; This used to crash.
+; v2i128 may not be a "simple" (MVT) type, but we can split that.
+; This example gets split further in legalization.
+
+define void @PR43916(<2 x i128> %y, <2 x i128>* %z) {
+; CHECK-LABEL: PR43916:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rcx, 24(%r8)
+; CHECK-NEXT: movq %rdx, 16(%r8)
+; CHECK-NEXT: movq %rsi, 8(%r8)
+; CHECK-NEXT: movq %rdi, (%r8)
+; CHECK-NEXT: retq
+;
+; CHECK_O0-LABEL: PR43916:
+; CHECK_O0: # %bb.0:
+; CHECK_O0-NEXT: movq %rdi, (%r8)
+; CHECK_O0-NEXT: movq %rsi, 8(%r8)
+; CHECK_O0-NEXT: movq %rdx, 16(%r8)
+; CHECK_O0-NEXT: movq %rcx, 24(%r8)
+; CHECK_O0-NEXT: retq
+ store <2 x i128> %y, <2 x i128>* %z, align 16
+ ret void
+}
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