[llvm] 37cdac6 - [X86] LowerAVXExtend - fix dodgy self-comparison assert.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 6 04:50:46 PST 2019
Author: Simon Pilgrim
Date: 2019-11-06T12:50:29Z
New Revision: 37cdac6344fbb51b40152e24470a61e940c76d12
URL: https://github.com/llvm/llvm-project/commit/37cdac6344fbb51b40152e24470a61e940c76d12
DIFF: https://github.com/llvm/llvm-project/commit/37cdac6344fbb51b40152e24470a61e940c76d12.diff
LOG: [X86] LowerAVXExtend - fix dodgy self-comparison assert.
PVS Studio noticed that we were asserting "VT.getVectorNumElements() == VT.getVectorNumElements()" instead of "VT.getVectorNumElements() == InVT.getVectorNumElements()".
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1ea147c16f7c..d1ed862db55e 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -19035,7 +19035,7 @@ static SDValue LowerAVXExtend(SDValue Op, SelectionDAG &DAG,
assert(VT.isVector() && InVT.isVector() && "Expected vector type");
assert((Opc == ISD::ANY_EXTEND || Opc == ISD::ZERO_EXTEND) &&
"Unexpected extension opcode");
- assert(VT.getVectorNumElements() == VT.getVectorNumElements() &&
+ assert(VT.getVectorNumElements() == InVT.getVectorNumElements() &&
"Expected same number of elements");
assert((VT.getVectorElementType() == MVT::i16 ||
VT.getVectorElementType() == MVT::i32 ||
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