[PATCH] D69601: [Power9] Implement the vector extend sign instruction pattern match
Qing Shan Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 5 19:05:41 PST 2019
steven.zhang marked an inline comment as done.
steven.zhang added inline comments.
================
Comment at: llvm/test/CodeGen/PowerPC/vector-extend-sign.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-P9
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-P9
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amyk wrote:
> I think it would be better to separate the run lines so it is not over 80 characters.
Done.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69601/new/
https://reviews.llvm.org/D69601
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