[PATCH] D69849: [mips] Implement Octeon+ `saa` and `saad` instructions

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic added a comment.

Missing test for SaaAddr and SaadAddr.



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Comment at: llvm/lib/Target/Mips/MipsSubtarget.cpp:76
       NoABICalls(false), Abs2008(false), IsFP64bit(false), UseOddSPReg(true),
-      IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false), HasCnMips(false),
+      IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false),
+      HasCnMips(false), HasCnMipsP(false),
----------------
clang format


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Comment at: llvm/test/MC/Mips/macro-saa.s:9
+# MIPS32:      addiu $1, $5, 8    # encoding: [0x24,0xa1,0x00,0x08]
+# MIPS32-NEXT: saa   $2, ($1)     # encoding: [0x70,0x22,0x00,0x18]
+
----------------
I didn't go through patch in detail, just a quick question here:
as complains that octeon+ requires mips64r2 (missing check in Subtarget constructor?)
but saa instruction itself does not require mips64r2?


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https://reviews.llvm.org/D69849